Untitled
Abstract: No abstract text available
Text: £ XC5200 Field Programmable Gate Arrays x ilin x August 6,1996 Version 4.01 Preliminary Product Specification Features • Fully supported by XACTsfep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed
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XC5200
PQ100
VQ100
TQ144
PG156
XC5202
XC5204
XC5210
XC5215
PQ160
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80C31 instruction set
Abstract: EXIF-91h
Text: DS80C320 DALLAS SEMICONDUCTOR FEA TU R ES • 80C32-Compatible - Pin-compatible Standard 8051 instruction set - F our8-bit I/O ports Three 16-bit timer/counters 256 bytes scratchpad RAM Multiplexed address/data bus Addresses 64K bytes ROM and 64K bytes RAM
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DS80C320
80C32-Compatible
10X10X2
abl4130
44-PIN
2bl413G
80C31 instruction set
EXIF-91h
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78078YGF
Abstract: BS1471 P721H
Text: D A TA SHEET MOS INTEGRATED CIRCUIT //IPD78074Y, 78075Y, 78076Y, 78078Y 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION The iiPD78074Y, 78075Y, 78076Y, and 78078Y are the same as the corresponding product without the Y suffix except that the PC bus control function has been added. These products are ideal for AV products.
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uPD78074Y
uPD78075Y
uPD78076Y
uPD78078Y
iiPD78074Y,
78075Y,
78076Y,
78078Y
uPD78P078
EEU-858
78078YGF
BS1471
P721H
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DALLAS DS80C320
Abstract: DS80C320-QCG T movx 80C32 DS80 DS80C320 DS80C320-FCG DS80C320-FNG DS80C320-QCG QDG775S
Text: DS80C320 DALLAS SEMICONDUCTOR FEA TU R ES • 80C32-Compatible - Pin-compatible Standard 8051 instruction set - F our8-bit I/O ports Three 16-bit timer/counters 256 bytes scratchpad RAM Multiplexed address/data bus Addresses 64K bytes ROM and 64K bytes RAM
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OCR Scan
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DS80C320
80C32-Compatible
16-bit
abl4130
000777a
44-PIN
2bl413Q
DALLAS DS80C320
DS80C320-QCG T
movx
80C32
DS80
DS80C320
DS80C320-FCG
DS80C320-FNG
DS80C320-QCG
QDG775S
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C101E
Abstract: No abstract text available
Text: MfciE » SEMICONDUCTOR □ 2 5 0 ^ 2 ^ 5 1 - 11 CYPRESS SEMICONDUCTOR Functional Description • BiCM O S for optimum speed/power • High speed max. — 2,5 ns tpu TTL-to-ECL T he CY10/101E383 is a new-generation TTL-to-ECL and ECL-to-TTL logic level translator designed for high-performance
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000775b
CY10E383
CY101E383
383-2JC
10E383--3JC
CY101E383
C101E
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TSO-C148
Abstract: RCA 719 RMS 01 EBT GR-253-CORE PM5346 PM5348 11CT40 PM5348R philips ferrite core 4b1
Text: PM S ta n d a r d P r o d u c t PM C-950919 PM C-Sierra, Inc. JSSUE6 PM5 3 4 8 S/UNI-DUAL SA TURN USER NETWORK INTERFACE FEATURES • Single chip dual ATM User-Network Interface operating at 155.52 and 51.84 Mbit/s. • Provides essential hardware and software compatibility with industry-standard
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PM5348S/UN/-DUAL
pmc-950919
PM5346
CI0041CI1
TSO-C148
RCA 719
RMS 01 EBT
GR-253-CORE
PM5348
11CT40
PM5348R
philips ferrite core 4b1
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