232cbe
Abstract: WJ-A35 GT-64010A R5000 GT64010
Text: Galileo Technology TM System Controller with GT-64010A Preliminary PCI Interface for R4XXX/ Revision 1.1 December 1996 R5000 Family CPUs NOTE: Always contact Galileo Technology for possible updates before starting a design. FEATURES • Integrated system controller with PCI bus interface for
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GT-64010A
R5000
R4600/4650/4700/R5000
50MHz
64-bit
256KB
512KB
GT-64012
R4600/R4700)
512MB
232cbe
WJ-A35
GT-64010A
GT64010
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C8051F226
Abstract: C8051F221 F206 C8051F206 C8051F220 c8015
Text: C8051F206 C8051F220/1/6 C8051F230/1/6 Mixed-Signal 8KB ISP FLASH MCU Family - On-Chip Debug Circuitry Facilitates Full Speed, Nonintrusive In-system Debug No Emulator Required! Provides Breakpoints, Single-Stepping, Watchpoints, Stack Monitor Inspect/Modify Memory and Registers
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C8051F206
C8051F220/1/6
C8051F230/1/6
F206/226/236)
16-Bit
CIP-51
MCS-51
B-100
C8051F226
C8051F221
F206
C8051F206
C8051F220
c8015
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ECP3-70
Abstract: spi flash ECP3-17 mcs 96 opcode ECP3-35 intel FPGA 0x510000 ECP3-150 lattice ECP3 slave SPI Port
Text: LatticeECP2/M and LatticeECP3 Dual Boot Feature October 2010 Technical Note TN1216 Introduction One of the biggest risks in field upgrade applications is disruption during the field upgrade process. Disruption can occur as: • Power disruption • Communications disruption
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TN1216
0x00FFFF
0xFFFF00)
ECP3-70
spi flash
ECP3-17
mcs 96 opcode
ECP3-35
intel FPGA
0x510000
ECP3-150
lattice ECP3 slave SPI Port
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S1C17564
Abstract: hx 630 S1C17 S1C17554 high power thyristor REGULATOR IC 7812 SMD
Text: CMOS 16-BIT SINGLE CHIP MICROCONTROLLER S1C17554/564 Technical Manual Rev.1.0 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability
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16-BIT
S1C17554/564
represe52-2585-4600
S1C17564
hx 630
S1C17
S1C17554
high power thyristor
REGULATOR IC 7812 SMD
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Ericsson TSR 491 628
Abstract: NT 1307c ericsson TSR 491 641 Ericsson nokia 1600 schematic diagram schematic diagram UPS active power 600 schematic diagram UPS 600 Power free marking code H02 schematic diagram UPS active power 400 tsi620-10gclv
Text: Tsi620 RapidIO Switch / RapidIO-to-PCI Bridge User Manual Preliminary October 2007 80D7000_MA001_02 Titlepage Trademarks TUNDRA is a registered trademark of Tundra Semiconductor Corporation Canada, U.S., and U.K. . TUNDRA, the Tundra logo, Tsi620, and Silicon Behind the Network, are trademarks of Tundra Semiconductor Corporation.
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Tsi620TM
80D7000
Tsi620,
Tsi620
Ericsson TSR 491 628
NT 1307c
ericsson TSR 491 641
Ericsson
nokia 1600 schematic diagram
schematic diagram UPS active power 600
schematic diagram UPS 600 Power free
marking code H02
schematic diagram UPS active power 400
tsi620-10gclv
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1E7d
Abstract: ATM transaction- ABSTRACT atm header error checking msap SN 104 SCR image CRC-10 CRC-32 IDT77211 CRC-32 for FDDI "Border Gateway Protocol"
Text: IDT77211 NICStAR User Manual Version 1.0 Released Edition February 26, 1997 Find IDT on the World Wide Web at: www.idt.com or Call us at 1-800-345-7015 IDT is located at: 2975 Stender Way Santa Clara, California, USA 95054-3090 0.0 Introduction to the User’s Manual Document
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IDT77211
1E7d
ATM transaction- ABSTRACT
atm header error checking
msap
SN 104 SCR image
CRC-10
CRC-32
CRC-32 for FDDI
"Border Gateway Protocol"
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ch7018a-tf
Abstract: STL 950/3 USC34 5V 2x24 lcd CH7017 CH7017A LODA 330M CCIR-656 1x24-bit
Text: CH7017/CH7018 Chrontel CH7017/CH7018 TV Encoder / LVDS Transmitter Features 1.0 General Description TV-Out: • VGA to TV conversion supporting up to 1024x768 pixels. • Macrovision 7.1.L1 copy protection support CH7017 only, CH7018 is non- Macrovision™ version .
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CH7017/CH7018
CH7017/CH7018
1024x768
CH7017
CH7018
CH7017A-TF
CH7017A-TF-TR
CH7018A-TF
CH7018A-TF-TR
ch7018a-tf
STL 950/3
USC34
5V 2x24 lcd
CH7017
CH7017A
LODA
330M
CCIR-656
1x24-bit
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netxtreme programmer
Abstract: BCM5701 PG105R S6D0 netxtreme 57xx gigabit controller BCM5704 BCM5715 broadcom BCM5715C BCM5788/M mac 7a8 transistor
Text: Programmer’s Guide BCM57XX Host Programmer Interface Specification for the NetXtreme Family of Highly Integrated Media Access Controllers 57XX-PG105-R 5300 California Avenue • Irvine, CA 92617 • Phone: 949-926-5000 • Fax: 949-926-5203 01/29/08 BCM57XX
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BCM57XX
57XX-PG105-R
57XX-PG104-R
PG105
netxtreme programmer
BCM5701
PG105R
S6D0
netxtreme 57xx gigabit controller
BCM5704
BCM5715
broadcom BCM5715C
BCM5788/M
mac 7a8 transistor
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circuit diagram for micro controller based caller
Abstract: the nios ii processor reference handbook 128 bit processor schematic lauterbach JTAG Programmer Schematics lauterbach JTAG Schematics ARM interface LCD Module Date Codes Explained transistor DATA REFERENCE handbook NII51001-10 NII51002-10 NII51003-10
Text: Section I. Nios II Processor Design This section provides information about the Nios II processor. This section includes the following chapters: July 2010 • Chapter 1, Introduction ■ Chapter 2, Processor Architecture ■ Chapter 3, Programming Model
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NII51001-10
circuit diagram for micro controller based caller
the nios ii processor reference handbook
128 bit processor schematic
lauterbach JTAG Programmer Schematics
lauterbach JTAG Schematics ARM interface
LCD Module Date Codes Explained
transistor DATA REFERENCE handbook
NII51002-10
NII51003-10
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SMD phase shifter 0201
Abstract: ts201S ADSP-TS201SABP-050 ADSP-TS201SABP-060 l3bc
Text: TigerSHARC Embedded Processor ADSP-TS201S • a KEY FEATURES KEY BENEFITS Up to 600 MHz, 1.67 ns instruction cycle rate 24M bits of internal—on-chip—DRAM memory 25 mm x 25 mm 576-ball thermally enhanced ball grid array package Dual-computation blocks—each containing an ALU, a
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576-ball)
14-channel
32-bit
40-bit
64-bit
BP-576
576-Ball
SMD phase shifter 0201
ts201S
ADSP-TS201SABP-050
ADSP-TS201SABP-060
l3bc
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MSK 1716
Abstract: No abstract text available
Text: PRELIMINARY TECHNICAL DATA Four Channel, 104 MSPS Digital Transmit Signal Processor TSP a Preliminary Technical Data AD6623 FEATURES PRODUCT DESCRIPTION The AD6623 has four identical digital transmit signal processors (TSP) complete with synchronization circuitry
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AD6622
18-bit
InterpoD6623
128-lead
AD6623
AD6623
MSK 1716
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12V Lm317
Abstract: MIPS R7000 GT-64010A RD5B R5000 RC4650 RC5000 RM7000 16M x8 55ns 72 pin flash dimm 0x130 ATE
Text: GT–64120A Galileo System Controller For RC4650/4700/5000 and RM526X/527X/7000 CPUs Datasheet Revision 1.1 JAN 10, 2001 Please contact Galileo Technology for possible updates before finalizing a design. FEATURES • Integrated system controller with PCI interface
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4120A
RC4650/4700/5000
RM526X/527X/7000
512MB
64-bit
64-bres
4120A
12V Lm317
MIPS R7000
GT-64010A
RD5B
R5000
RC4650
RC5000
RM7000
16M x8 55ns 72 pin flash dimm
0x130 ATE
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ADSP-2188
Abstract: EE-146 adsp 218x user manual
Text: Engineer To Engineer Note a EE-146 Technical Notes on using Analog Devices' DSP components and development tools Contact our technical support by phone: 800 ANALOG-D or e-mail: dsp.support@analog.com Or visit our on-line resources http://www.analog.com/dsp and http://www.analog.com/dsp/EZAnswers
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EE-146
ADSP-218x
ADSP-21xx
EE-125)
ADSP-2106x:
EE-108)
ADSP-2188
EE-146
adsp 218x user manual
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excalibur APEX development board nios
Abstract: "dual 7 Segment" APEX nios development board dual 7-segment led JP13 altera board
Text: Nios Embedded Processor Development Board April 2002, ver. 2.1 Data Sheet Introduction This data sheet describes the features and functionality of the Nios CPU development board included in the ExcaliburTM Development Kit, featuring the Nios embedded processor.
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20K200E
16-bit)
32-bit
16-bit
excalibur APEX development board nios
"dual 7 Segment"
APEX nios development board
dual 7-segment led
JP13
altera board
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Untitled
Abstract: No abstract text available
Text: Reference Manual HCS08 Microcontrollers MC9S08MM128RM Rev. 3 07/2010 freescale.com Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: MC9S08MM128 products in 81 MAPBGA packages
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MC9S08MM128
MC9S08MM64
MC9S08MM32
MC9S08MM32A
MC9S08MM128RM
HCS08
MC9S08MM128RM
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10 295 1155
Abstract: lm 386 l freescale superflash ATD10B16CV2
Text: MC9S12E128 MC9S12E64 MC9S12E32 Data Sheet HCS12 Microcontrollers MC9S12E128V1 Rev. 1.07 10/2005 freescale.com MC9S12E128 Data Sheet covers MC9S12E64 & MC9S12E32 MC9S12E128V1 Rev. 1.07 10/2005 To provide the most up-to-date information, the revision of our documents on the World Wide Web will be
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MC9S12E128
MC9S12E64
MC9S12E32
HCS12
MC9S12E128V1
MC9S12E64
10 295 1155
lm 386 l
freescale superflash
ATD10B16CV2
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bfp760
Abstract: ADSP-TS201 reverse carry addition WPCT ADSP-21263 C-15 ts101 dsp application note boot kernel for the ADSP-21369 xr120xddddcccc "vector instructions" saturation
Text: ADSP-TS201 TigerSHARC Processor Programming Reference Revision 1.1, April 2005 Part Number 82-000810-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express
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ADSP-TS201
bfp760
reverse carry addition
WPCT
ADSP-21263
C-15
ts101 dsp application note
boot kernel for the ADSP-21369
xr120xddddcccc
"vector instructions" saturation
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panasonic inverter manual vf 200
Abstract: panasonic inverter manual vf 100 panasonic vf 200 inverter manual PLT-16 panasonic TV tuner VF0 Panasonic inverter MN101C c compiler
Text: MICROCOMPUTER MN101C MN101C46F/F46F LSI User’s Manual Pub.No.21446-021E “PanaXSeries” is a trademark of Matsushita Electric Inustrial Co., Ltd. The other corporation names, logotype and product names written in this book are trademarks or registered trademarks of
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MN101C
MN101C46F/F46F
21446-021E
panasonic inverter manual vf 200
panasonic inverter manual vf 100
panasonic vf 200 inverter manual
PLT-16
panasonic TV tuner
VF0 Panasonic inverter
MN101C c compiler
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PID code for DC Motor control lpc1768
Abstract: lpc1768 qei encoder language example
Text: UM10360 LPC176x/5x User manual Rev. 3.1 — 2 April 2014 User manual Document information Info Content Keywords LPC1769, LPC1768, LPC1767, LPC1766, LPC1765, LPC1764, LPC1763, LPC1759, LPC1758, LPC1756, LPC1754, LPC1752, LPC1751, ARM, ARM Cortex-M3, 32-bit, USB, Ethernet, CAN, I2S, Microcontroller
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UM10360
LPC176x/5x
LPC1769,
LPC1768,
LPC1767,
LPC1766,
LPC1765,
LPC1764,
LPC1763,
LPC1759,
PID code for DC Motor control lpc1768
lpc1768 qei encoder language example
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a562 transistor
Abstract: transistor A562 d2118 DSP1c D61 6A-1 D2730 transistor D1812 H3C1 A966 transistor power 22E
Text: Freescale Semiconductor User’s Guide PTKIT8101UG Rev. 1, 9/2005 MSC8101 Packet Telephony Farm Card MSC8101PFC The MSC8101 DSP subsystem on the MSC8101 packet telephony farm card (MSC8101PFC) performs the signal processing functions for voice, fax, and modem data
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PTKIT8101UG
MSC8101
MSC8101PFC)
MCS8101
MSC8101PFC
MSC8101
a562 transistor
transistor A562
d2118
DSP1c
D61 6A-1
D2730
transistor D1812
H3C1
A966 transistor
power 22E
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MIPS R7000
Abstract: No abstract text available
Text: .«llfek. Product Preview Revision 1.3 FEB 8, 1999 G T -64120 i j a l i l e a System Controller For RC4650/4700/ 5000 and RM526X/527X/7000 CPUs P lease con ta ct G alileo Technology fo r possib le updates before finalizing a design. FEATURES • • Integrated system controller with PCI Interface for
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RC4650/4700/
RM526X/527X/7000
64-bit
RM7000
RC4650
RC5000
R5000
32-bit
24-bit
MIPS R7000
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Untitled
Abstract: No abstract text available
Text: ü ja lile o . GT-96010 Remote Access Coprocessor Preliminary Revision 1.0 8/12/97 Please contact Galileo Technology for possi b e updates before finalizing a design. FEATURES * Integrated serial communications controller and system core logic device - Direct interface to i960 Jx family of CPUs
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GT-96010
i960Hx
128Mbyte
256K-4M
32-bit
16-bit
31CLK
ive\9601Old
GT-96010
ve\960l
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Untitled
Abstract: No abstract text available
Text: GT-64060 IBBIBk « Galileo !»; Technology High-lntegration PCI Bridge/ Memory Controller P roduct Preview R evision 0.7 4/1/97 Please contact Galileo Technology for possible updates before finalizing a design. FEATURES • High-integration PCI bridge/memory controller with
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GT-64060
32-bit
50MHz
150Mbytes/sec
512MB
256KB-16MB
R2000/3000
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rsm 2814
Abstract: No abstract text available
Text: 1.0 Product Description - The Bt8209 and Bt8210 Switched Multimegabit Data Service SMDS Control and Reassembly Formatters (SCARF) provide a single-access SMDS service ter mination for connectionless data, “datagram,” transfer according to Bellcore TRTSV-000772 and TR-TSV-000773. Customer Premise Equipment (CPE) and
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Bt8209
Bt8210
TRTSV-000772
TR-TSV-000773.
TR-TSV-000774
TR-TSV-000775
0x2000-0x3FFF)
L8210
rsm 2814
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