Untitled
Abstract: No abstract text available
Text: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains
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HI-6130
HI-6131
HI-6132
MIL-STD-1553
MIL-STD-1760
HI-613x
MIL-STD-1553B
HI-6132:
121BGA
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Untitled
Abstract: No abstract text available
Text: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains
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HI-6130
HI-6131
HI-6132
MIL-STD-1553
MIL-STD-1760
HI-613x
MIL-STD-1553B
HI-6130,
HI-6131
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STI3400
Abstract: connector h20
Text: module fifo title ’ PLX TECHNOLOGY * PROPRIETARY INFORMATION * FIFO: FIFO Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 7.0 10-23-95 Copyright PLX Technology, 1995 ’ "device declaration fifo device ’MACH220A’;
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MACH220A'
0x06f6
0xe45d
0xe422
0xe442
0xeb25
clk25
STI3400
connector h20
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L1239
Abstract: l0728 l0312 SGS L282 L0936 L11616 L9960 0x00000404 L1198 L1322
Text: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _
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9060/MPEG
L1239
l0728
l0312
SGS L282
L0936
L11616
L9960
0x00000404
L1198
L1322
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Untitled
Abstract: No abstract text available
Text: HI-6130 / HI-6131 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • Two options are offered for host access to internal registers and static RAM: The HI-6130 uses a 16-bit parallel bus; the HI-6131 communicates with the host
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HI-6130
HI-6131
MIL-STD-1553
MIL-STD-1760
16-bit
HI-6131
HI-6130
16-bit
100-pin
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IRIG B generator
Abstract: lm 16151 HI-6131 HI-6130 DS6130 pin diagram for IC 1619 30 pin HI-6132 TT32 digital timer IRIG B 122 generator 0x02FE
Text: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains
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HI-6130
HI-6131
HI-6132
MIL-STD-1553
MIL-STD-1760
16-bit
48bit
IRIG106
IRIG-106
IRIG B generator
lm 16151
DS6130
pin diagram for IC 1619 30 pin
TT32 digital timer
IRIG B 122 generator
0x02FE
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Untitled
Abstract: No abstract text available
Text: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains
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HI-6130
HI-6131
HI-6132
MIL-STD-1553
MIL-STD-1760
HI-613x
MIL-STD-1553B
HI-6130,
HI-6131
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L0936
Abstract: l0728 L1239 L0988 L9960 l0312 l0832 L4204 l0416 L9804
Text: module busctl title ’ PLX TECHNOLOGY * PROPRIETARY INFORMATION * BUSCTL: Local Bus Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 3.0 10-20-95 Copyright PLX Technology, 1995 ’ "device declaration
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MACH220A'
0xe60b
0x350b
STI3400
STI4500.
PCI9060
16-bit.
0x2043
V0166
V0167
L0936
l0728
L1239
L0988
L9960
l0312
l0832
L4204
l0416
L9804
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la2 d2 timer
Abstract: L0936 Header 13X2 l0728 PIN DIAGRAM OF IC LM7805 U0202 L9960 STI3400 L1239 L4204
Text: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PLX Technology SGS PCI MPEG Board Engineering Changes 07/15/96 1. The PCI9060 always reads long words, even when the local bus is configured for 16-bits. Modify the BUSCTL
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PCI9060
16-bits.
la2 d2 timer
L0936
Header 13X2
l0728
PIN DIAGRAM OF IC LM7805
U0202
L9960
STI3400
L1239
L4204
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Untitled
Abstract: No abstract text available
Text: HI-6130 / HI-6131 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • Two options are offered for host access to internal registers and static RAM: The HI-6130 uses a 16-bit parallel bus; the HI-6131 communicates with the host
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HI-6130
HI-6131
MIL-STD-1553
MIL-STD-1760
16-bit
HI-6131
HI-6130
16-bit
100-pin
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PDF
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Untitled
Abstract: No abstract text available
Text: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains
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HI-6130
HI-6131
HI-6132
MIL-STD-1553
MIL-STD-1760
HI-613x
MIL-STD-1553B
HI-6130,
HI-6131
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PDF
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Untitled
Abstract: No abstract text available
Text: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains
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HI-6130
HI-6131
HI-6132
MIL-STD-1553
MIL-STD-1760
HI-613x
MIL-STD-1553B
HI-6130,
HI-6131
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L0936
Abstract: L0988 L9960 L1239 STI3400 L1462 E442 L1105 L3216 U0601
Text: Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _ General Description _ Features_
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9060/MPEG
L0936
L0988
L9960
L1239
STI3400
L1462
E442
L1105
L3216
U0601
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IRIG B generator
Abstract: HI-6131 IRIG B 122 generator lm 16151 IRIG-106 BT 2323 M ic pin configuration 80HEX Holt 1553 Controller HI6110 mc16 TSR16
Text: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains
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HI-6130
HI-6131
HI-6132
MIL-STD-1553
MIL-STD-1760
16-bit
48bit
IRIG106
IRIG-106
IRIG B generator
IRIG B 122 generator
lm 16151
BT 2323 M ic pin configuration
80HEX
Holt 1553 Controller HI6110
mc16
TSR16
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