uPD4216160L
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD42S16160L, 4216160L, 42S18160L, 4218160L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The µPD42S16160L, 4216160L, 42S18160L, 4218160L are 1,048, 576 words by 16 bits CMOS dynamic RAMs.
|
Original
|
PDF
|
PD42S16160L,
4216160L,
42S18160L,
4218160L
16-BIT,
4218160L
uPD4216160L
|
IC-3217
Abstract: PD42S18160 NEC 4216160 UPD4218160G5-50
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD42S16160, 4216160, 42S18160, 4218160 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The µPD42S16160, 4216160, 42S18160, 4218160 are 1,048, 576 words by 16 bits CMOS dynamic RAMs. The
|
Original
|
PDF
|
PD42S16160,
42S18160,
16-BIT,
42S18160
50-pin
42-pin
495robots
IC-3217
PD42S18160
NEC 4216160
UPD4218160G5-50
|
4218160
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD42S18160L, 4218160L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The µPD42S18160L, 4218160L are 1,048, 576 words by 16 bits CMOS dynamic RAMs. The fast page mode and
|
Original
|
PDF
|
PD42S18160L,
4218160L
16-BIT,
4218160L
PD42S18160L
50-pin
42-pin
VP15-207-2
4218160
|
4218160-60
Abstract: 4218160 IC-3217 4218160G5 UPD42S18160LE-60 PD42S18160
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD42S18160, 4218160 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The µ PD42S18160, 4218160 are 1,048, 576 words by 16 bits CMOS dynamic RAMs. The fast page mode and byte read/write mode capability realize high speed access and low power consumption.
|
Original
|
PDF
|
PD42S18160,
16-BIT,
PD42S18160
50-pin
42-pin
VP15-207-2
4218160-60
4218160
IC-3217
4218160G5
UPD42S18160LE-60
|
modbus-rtu
Abstract: LCM200 solid state variable relay Weight controller BLH weight 1045 FISHER
Text: Model LCm-200 Vishay BLH Transducers Weight Controller FEATURES • Designed for NIST Handbook 44 compliance • Canadian weights and measures and NTEP CoC • Rate-by-weight Mass Flow operation • Expansion slot for A-B remote I/O, Modbus Plus, or future
|
Original
|
PDF
|
LCm-200
LCm-200
LCm-200s
08-Apr-05
modbus-rtu
LCM200
solid state variable relay
Weight controller
BLH weight
1045 FISHER
|
Untitled
Abstract: No abstract text available
Text: DATA SHEET / MOS INTEGRATED CIRCUIT //PD42S16160L, 4216160L, 42S18160L, 4218160L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The ¿¡PD42S16160L, 4216160L, 42S18160L, 4218160Lare 1,048, 576 words by 16 bits CMOS dynamic RAMs.
|
OCR Scan
|
PDF
|
uPD42S16160L
uPD4216160L
uPD42S18160L
uPD4218160L
16-BIT,
PD42S16160L,
4216160L,
42S18160L,
4218160Lare
|
UPD42S18160G5-70-7-JF
Abstract: UPD42S18160G5707JF uPD42S18160-50 UPD4216160G uPD42S18160G5-50-7JF UPD4216160G5-50 PD42S18160-60 UPD42S18160G5-60-7JF NEC 4216160 UPD4218160G5-80-7JF
Text: DATA SHEET / MOS INTEGRATED CIRCUIT / PD42S16160,4216160,42S18160,4218160 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE D e s c rip tio n The /xPD42S16160, 4216160, 42S18160, 4218160 are 1,048, 576 words by 16 bits CMOS dynamic RAMs. The
|
OCR Scan
|
PDF
|
uPD42S16160
uPD4216160
uPD42S18160
uPD4218160
16-BIT,
/xPD42S16160,
42S18160,
PD42S16160,
42S18160
50-pin
UPD42S18160G5-70-7-JF
UPD42S18160G5707JF
uPD42S18160-50
UPD4216160G
uPD42S18160G5-50-7JF
UPD4216160G5-50
PD42S18160-60
UPD42S18160G5-60-7JF
NEC 4216160
UPD4218160G5-80-7JF
|
Untitled
Abstract: No abstract text available
Text: Preliminary information •■ AS4C1M 16F5 A 5V 1M x 16 C M O S DRAM fast page mode Features • 1024 refresh cycles, 16 m s refresh interval • O rganization: 1,048 ,5 7 6 w ords x 16 bits • H igh speed - KAS-only or CAS-before-KAS refresh • R ead-m odify-w rite
|
OCR Scan
|
PDF
|
42-pin
44/50-pin
AS4C1M16E0-60)
AS4C1M16F5-50JC
AS4C1M16F5-50JI
AS4C1M16F5-60JC
AS4C1M16F5-60JI
44/50-pin
AS4C1M16F5-50TC
AS4C1M16F5-50TI
|
4218160LE-60
Abstract: No abstract text available
Text: DATA SHEET NEC MOS INTEGRATED CIRCUIT ¿¿PD 42S18160, 4 2 1 8 1 6 0 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The ,uPD42S18160, 4218160 are 1,048, 576 words by 16 bits CMOS dynamic RAMs. The fast page mode and
|
OCR Scan
|
PDF
|
42S18160,
16-BIT,
uPD42S18160
PD42S18160
50-pin
42-pin
4218160LE-60
|
Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT ¿¿PD4 2 S 1 8 1 6 0 L , 4 2 1 8 1 6 0 L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE The ,uPD42S18160L, 4218160L are 1,048, 576 words by 16 bits CMOS dynamic RAMs. The fast page mode and
|
OCR Scan
|
PDF
|
16-BIT,
uPD42S18160L
4218160L
PD42S18160L
50-pin
42-pin
|
Untitled
Abstract: No abstract text available
Text: DATA SHEET / MOS INTEGRATED CIRCUIT ¿¿PD 42S16160,4216160,42S18160,4218160 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The ¿¡PD42S161 60 , 4 2 1 6 1 6 0 , 4 2 S 1 81 60 , 4 2 1 8 1 6 0 are 1,048, 5 7 6 words by 16 bits C M O S dynam ic RAM s. The
|
OCR Scan
|
PDF
|
16-BIT,
PD42S161
42S16160,
50-pin
42-pin
|
Untitled
Abstract: No abstract text available
Text: Preliminary information •■ AS4C1M16F5 II 5V 1M x 16 C M O S DRAM fast page mode Features • O rganization: 1,048 ,5 7 6 w ords • H igh speed X • 1024 refresh cycles, 16 m s refresh interval 16 bits - K A S -o n ly o r C A S -b e fo r e -K A S r e f r e s h
|
OCR Scan
|
PDF
|
AS4C1M16F5
42-pin
AS4C1M16F5-50JC
AS4C1M16F5-60JC
1M16E0
|
1MX16
Abstract: AS4LC1M16S0 4lc2m8
Text: AS4LC2M8S0 AS4LC1M16S0 H igh Perform ance 2MX8/1MX16 CMOS DRAM 1 6 M egabit CM O S synchronous DRAM Advance information Features • Organization: 1,048 ,5 7 6 w ords x 8 bits x 2 banks 2M x8 52 4 ,2 8 8 w ords x 16 bits x 2 banks (lM x 16) • All signals referenced to positive edge o f dock
|
OCR Scan
|
PDF
|
2MX8/1MX16
AS4LC1M16S0
AS4LC2M8S0-10TC
2M8S0-12TC
50-pin
AS4LC1M16S0-10TC
LCIM16S0-12TC
0001b27
G1998
1MX16
AS4LC1M16S0
4lc2m8
|
MSM51V18165A
Abstract: MSM51V18165
Text: O K I Semiconductor M SM 51V18165A_ 1,048,576-Ward x 16-Blt DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO DESCRIPTION The MSM51V18165A is a 1,048¿76-w ord x 16-bit dynam ic RAM fabricated in O KI’s CM OS silicon gate technology. The M SM 51V18165A achieves high integration, high-speed operation, and lowpower consumption due to quadruple polysilicon double metal CM OS. The M SM 51V18165A is
|
OCR Scan
|
PDF
|
MSM51V18165A
576-Word
16-Btt
MSM51V18165A
16-bit
42-pin
/44-pin
MSM51V18165
|
|
|
UEC-14
Abstract: No abstract text available
Text: O K I Semiconductor MSM531622C - 1,048,576-Word x 16-Bit or 2,097,152-Word x 8-Bit Mask ROM DESCRIPTION The OKI M SM S31622C is a high-speed CM OS M ask ROM that can electrically sw itch betw een 1,048 576w ord x 16-bit or 2 097,152-w o rd x 8-bit configurations. The M S M 531622C operates on a single 5 0 V p ow er
|
OCR Scan
|
PDF
|
MSM531622C
576-Word
16-Bit
152-Word
ssMSM531622C
UEC-14
|
IC-321B
Abstract: p421e P421E-400A
Text: DATA SHEET / MOS INTEGRATED CIRCUIT jUPD42S16160L, 4216160L, 42S18160L, 4218160L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description T h e ^ P D 4 2 S 1 6 1 6 0 L , 4216160L, 42S 18 1 6 0 L , 4 2 1 8 1 6 0 L are 1,048, 576 w ords by 16 bits C M O S dyna m ic RAMs.
|
OCR Scan
|
PDF
|
uPD42S16160L
uPD4216160L
uPD42S18160L
uPD4218160L
16-BIT,
4216160L,
50-pin
42-pin
VP15-207-2
IC-321B
p421e
P421E-400A
|
MSM538022C
Abstract: No abstract text available
Text: O K I Semiconductor MSM538022C 524,288-W ord x 16-B it o r 1,048,576-W ord x 8 -Bit M ask ROM DESCRIPTION The OKI MSM538022C is a high-speed CMOS M ask ROM th at can electrically sw itch betw een 524 288w o rd x 16-bit a n d 1,048 576-w ord x 8-bit configurations. The MSM538022C o perates o n T s in i 5 0 V
|
OCR Scan
|
PDF
|
MSM538022C
288-Word
16-Bit
576-Word
MSM538022C
L72MP40
|
D42S18160
Abstract: d42s181 D42S1816 UPD42S18160LG5A-60
Text: D A T A SHEET / MOS INTEGRATED CIRCUIT /¿ P D 4 2 S 1 6 1 6 0 L , 4 2 1 6 1 6 0 L. 4 2 S 1 8 1 6 0 L , 4 2 1 8 1 6 0 L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The /¿PD42S16160L, 4216160L, 4 2S 18160L, 4 2 18160L are 1,048, 576 w ords by 16 bits CMOS dynam ic RAMs.
|
OCR Scan
|
PDF
|
16-BIT,
uPD42S16160L
uPD4216160L
uPD42S18160L
uPD4218160L
PD42S16160L,
18160L
50-pin
42-pin
D42S18160
d42s181
D42S1816
UPD42S18160LG5A-60
|
NEC 4216160
Abstract: No abstract text available
Text: DATA SHEET NEC / MOS INTEGRATED CIRCUIT _ _ _ _ _ _ _ /¡¿ P D 42S 16160, 4216160, 42S 18160,4218160 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description T h e /1 P D 4 2 S 1 6 1 6 0 ,4 21 6160, 4 2 S 1 8 1 6 0 ,4 2 1 8 1 6 0 a re 1,048, 576 w o rds by 16 b its C M O S d y n a m ic RA M s. T he
|
OCR Scan
|
PDF
|
16-BIT,
uPD42S16160
uPD4216160
uPD42S18160
uPD4218160
/zPD42S16160,
42-pin
VP15-207-2
NEC 4216160
|
EZ 929
Abstract: S1616
Text: DATA SHEET NEC / MOS INTEGRATED CIRCUIT _ _ _ _ _ _ _ _ //¿PD42S16160L, 4216160L, 42S18160L, 4218160L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-W ORD B Y 16-BIT, FA ST P A G E M ODE, B Y T E READ/WRITE M O D E D escrip tion T h e ¿ iP D 4 2 S 1 6 1 6 0 L , 4 2 1 6 1 6 0 L , 4 2 S 1 6 1 6 0 L , 4 2 1 8 1 6 0 L a re 1,048, 576 w ord s by 16 b its C M O S d y n a m ic R A M s .
|
OCR Scan
|
PDF
|
uPD42S16160L
uPD4216160L
uPD42S18160L
uPD4218160L
16-BIT,
S16160L,
IR35-207-3
P15-207-3
EZ 929
S1616
|
A112-4D
Abstract: No abstract text available
Text: COUL D I N C / G O U L D A M I 40E D • nnuLD MQSS'ilb 0013233 1 ■ A M I 8M Bit 1 048,576 x 8) . Static CMOS Mash ROM Preliminary Data Sheet A i f l i M * Semiconductors S638000(INI x 8) 1 iS ftH v Y > Features General Description • Fast Access Time:
|
OCR Scan
|
PDF
|
S638000
S638000-15-150ns
S638000-20-200ns
220mW
A112-4D
|
LH538000
Abstract: 538000-1B
Text: LH538000 FEATURES • CMOS 8M 1M x 8 / 512K x 16 Mask-Programmabie ROM DESCRIPTION 1,048,576 x 8 bit organization (Byte mode) 524,288 x 16 bit organization (Word mode) • BYTE input pin selects bit configuration • Access time: 200 ns (MAX.) • Power consumption:
|
OCR Scan
|
PDF
|
LH538000
42-pin,
600-mil
44-pin,
48-pin,
64-pin,
LH538000
42-PIN
538000-1B
|
Untitled
Abstract: No abstract text available
Text: Mar 25, 1991 M5M51014J-25t-35,-45 MITSUBISHI 1.Q4&376BITÇ262144-WORD BY 4-BIT STATIC RAM DESCRIPTION The M5M51014 is a family of262,144word by 4-bit static RAMs, fabricated with the high performance CMOS silicon gate process and designed for high-speed application. These
|
OCR Scan
|
PDF
|
M5M51014J-25t-35
376BITÃ
262144-WORD
M5M51014
of262
144word
M5M51014J-25
M5M51014J-35
M5M51014J-45
400mW
|
Untitled
Abstract: No abstract text available
Text: TOSHIBA TC 551001 BPI/BFI/BFTI/BTRI/BSTI/BSRI-85,-10 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 131,072-WORD BY 8-BIT STATIC RAM DESCRIPTION The TC551001BPI/BFI/BFTI/BTRI/BSTI/BSRI is a 1,048 576-bit static random access memory SRAM organized as 131,072 words by 8 bits. Fabricated using Toshiba’s CMOS Silicon gate process technology, this
|
OCR Scan
|
PDF
|
072-WORD
BPI/BFI/BFTI/BTRI/BSTI/BSRI-85
TC551001BPI/BFI/BFTI/BTRI/BSTI/BSRI
576-bit
32-P-0820-0
32-P-0
|
