CHN 550
Abstract: CHN 545 chn 710 CHN 712 chn 538 CHN 431 CHN 709 CHN 741 chn 738 chn 648 equivalent
Text: R&S ZNC/ZND Vector Network Analyzers User Manual ;xíÇ2 User Manual Test & Measurement 1173.9557.02 ─ 26 This manual describes the following vector network analyzer types: ● R&S®ZNC3 (2 ports, 9 kHz to 3 GHz, N connectors), order no. 1311.6004K12
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6004K12
ZNC-B10
ZN-B14
ZNC-B19
ZNC3-B22
ZNC-K19
VXI-11
CHN 550
CHN 545
chn 710
CHN 712
chn 538
CHN 431
CHN 709
CHN 741
chn 738
chn 648 equivalent
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ADSP-21160
Abstract: KLS65
Text: DSP Microcomputer ADSP-21160 Preliminary Technical Data 6800$5< . < ($785(6 y r a n i l m a i l c i e Pr chn a Te Dat DUAL-PORTED SRAM CORE PROCESSOR TIMER INSTRUCTION CACHE TWO INDEPENDENT DUAL-PORTED BLOCKS 32 x 48-BIT
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ADSP-21160
48-BIT
8x4x32
/236SHDNDQG0
63LVWREHGHWHUPLQHG
ADSP-21160
KLS65
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SCR PIN CONFIGURATION CHN 035
Abstract: AD7912 AD7912ARM AD7922 DB10 VT235 16t5t
Text: PRELIMINARY TECHNICAL DATA a Preliminary Technical Data FEATURES Fast Throughput Rate: 1MSPS Specified for VDD of 2.35 V to 5.25 V Low Power: 3.6 mW typ at 1MSPS with 3V Supplies 12.5mW typ at 1MSPS with 5V Supplies Wide Input Bandwidth: 71dB SNR at 100kHz Input Frequency
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100kHz
AD7912/4
MO-193BA
MO-187AA
SCR PIN CONFIGURATION CHN 035
AD7912
AD7912ARM
AD7922
DB10
VT235
16t5t
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AD9752
Abstract: AD9752AR AD9752ARU AD9752-EB DB10 RU-28 R-2R resistor
Text: a 12-Bit, 100 MSPS+ TxDAC D/A Converter AD9752* Preliminary Technical Data FEATURES Member of Pin-Compatible TxDAC Product Family 125 MSPS Update Rate 12-Bit Resolution Excellent Spurious Free Dynamic Range Performance SFDR to Nyquist @ 5 MHz Output: 72 dBc
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12-Bit,
AD9752*
12-Bit
28-Lead
RU-28)
AD9752
AD9752AR
AD9752ARU
AD9752-EB
DB10
RU-28
R-2R resistor
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CHN 535
Abstract: CHN 321 chn 711
Text: a 28-Lead Flash Memory DSP Motor Controller ADMCF326 Preliminary Technical Data TARGET APPLICATIONS Washing Machines, Refrigerator Compressors, Fans, Pumps, Industrial Variable Speed Drives Three-Phase 16-Bit PWM Generator 16-Bit Center-Based PWM Generator
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ADSP-21xx
24-Bit
16-Bit
Memory0926
28-Lead
CHN 535
CHN 321
chn 711
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c3377
Abstract: AD9750 AD9750AR AD9750ARU AD9750-EB AWG2021 RU-28
Text: a 10-Bit, 100 MSPS+ TxDAC D/A Converter AD9750* Preliminary Technical Data FEATURES Member of Pin-Compatible TxDAC Product Family 125 MSPS Update Rate 10-Bit Resolution Excellent Spurious Free Dynamic Range Performance SFDR to Nyquist @ 5 MHz Output: 72 dBc
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10-Bit,
AD9750*
10-Bit
28-Lead
150pF
20V70)
RU-28)
c3377
AD9750
AD9750AR
AD9750ARU
AD9750-EB
AWG2021
RU-28
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AD8350
Abstract: AD8350-15 AD8350-20
Text: a Low Distortion 1.2GHz Differential Amplifier AD8350 Preliminary Technical Data FEATURES High Dynamic Range Output IP3: +24 dBm @250 MHz Low Noise Figure: 6.1 dB @250 MHz Three Gain Versions: AD8350-10 10 dB AD8350-15 15 dB AD8350-20 20 dB -3 dB Bandwidth:
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AD8350
AD8350-10
AD8350-15
AD8350-20
AD8350
AD8350-15
AD8350-20
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EVAL-AD73322LEB
Abstract: 74HC74D-T AD73322 AD73322L AD73322LAR AD73322LAST
Text: a Low Cost, Low Power CMOS General Purpose Dual Analog Front End Preliminary Technical Data FEATURES Two 16-Bit A/D Converters Two 16-Bit D/A Converters Programmable Input/Output Sample Rates 78 dB ADC SNR 77 dB DAC SNR 64 kS/s Maximum Sample Rate –90 dB Crosstalk
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16-Bit
28-Lead
44-Lead
AD73322L
ST-44A)
EVAL-AD73322LEB
74HC74D-T
AD73322
AD73322L
AD73322LAR
AD73322LAST
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CHN 534
Abstract: CHN 533 CHN 650 B/transistor chn 534 CHN 450 transistor CHN d5332 transistor chn 115
Text: µA Dual Rail-to-Rail +2.5V to 5.5V, 230µ Voltage-Output DACs with Parallel Interface Preliminary Technical Data AD5332/AD5333/AD5342/AD5343* a FEATURES AD5332: Dual 8-Bit DAC in 20-Lead TSSOP AD5333: Dual 10-Bit DAC in 24-Lead TSSOP AD5342: Dual 12-Bit DAC in 28-Lead TSSOP
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AD5332/AD5333/AD5342/AD5343*
AD5332:
20-Lead
AD5333:
10-Bit
24-Lead
AD5342:
12-Bit
28-Lead
AD5343:
CHN 534
CHN 533
CHN 650
B/transistor chn 534
CHN 450
transistor CHN
d5332
transistor chn 115
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bipolar transistor bc107
Abstract: AD5332 AD5332BRU AD5333 AD5333BRU AD5342 AD5342BRU AD5343 AD5343BRU ad ref192
Text: µA Dual Rail-to-Rail +2.5V to 5.5V, 230µ Voltage-Output DACs with Parallel Interface Preliminary Technical Data AD5332/AD5333/AD5342/AD5343* a FEATURES AD5332: Dual 8-Bit DAC in 20-Lead TSSOP AD5333: Dual 10-Bit DAC in 24-Lead TSSOP AD5342: Dual 12-Bit DAC in 28-Lead TSSOP
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AD5332/AD5333/AD5342/AD5343*
AD5332:
20-Lead
AD5333:
10-Bit
24-Lead
AD5342:
12-Bit
28-Lead
AD5343:
bipolar transistor bc107
AD5332
AD5332BRU
AD5333
AD5333BRU
AD5342
AD5342BRU
AD5343
AD5343BRU
ad ref192
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v3055
Abstract: CHGEN VTCXO ADP3408 RU-28 TSSOP-28 DVTCXO AD20msp430
Text: = Preliminary Technical Data GSM Power Management System ADP3408 FUNCTIONAL BLOCK DIAGRAM FEATURES Handles all GSM Baseband Power Management Six LDOs Optimized for Specific GSM Subsystems Li-Ion and NiMH Battery Charge Function Optimized for the AD20msp430 Baseband Chipset
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ADP3408
AD20msp430
ADP3408
28-Lead
RU-28)
v3055
CHGEN
VTCXO
RU-28
TSSOP-28
DVTCXO
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uPD424210AL
Abstract: ADV601 ADV601LC CCIR-656 H261 Philips SAA7111 CCTV DISTRIBUTION NETWORK diagram CCTV wireless functional diagram hm514265cj-60 ef97
Text: a Ultralow Cost Video Codec ADV601LC GENERAL DESCRIPTION FEATURES 100% Bitstream Compatible with the ADV601 Precise Compressed Bit Rate Control Field Independent Compression 8-Bit Video Interface Supports CCIR-656 and Multiplexed Philips Formats General Purpose 16- or 32-Bit Host Interface With
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ADV601LC
ADV601
CCIR-656
32-Bit
CCIR-601
ADV60160
ADV601LCJST
120-Lead
ST-120
uPD424210AL
ADV601
ADV601LC
H261
Philips SAA7111
CCTV DISTRIBUTION NETWORK diagram
CCTV wireless functional diagram
hm514265cj-60
ef97
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PDF
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chn 656
Abstract: TV toshiba dramatic CHN 524 chn 238 chn 720 TV toshiba dramatic vision chn 622 ST chn 624 chn 621
Text: BACK a Ultralow Cost Video Codec ADV601LC GENERAL DESCRIPTION FEATURES 100% Bitstream Compatible with the ADV601 Precise Compressed Bit Rate Control Field Independent Compression 8-Bit Video Interface Supports CCIR-656 and Multiplexed Philips Formats General Purpose 16- or 32-Bit Host Interface With
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ADV601
CCIR-656
32-Bit
CCIR-601
ADV601LC
ADV601LC
ADV601LCJST
ST-120
120-Lead
chn 656
TV toshiba dramatic
CHN 524
chn 238
chn 720
TV toshiba dramatic vision
chn 622
ST chn 624
chn 621
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VT235
Abstract: AD7911 AD7921 DB10 chn 135 CHN 804 ad7802
Text: PRELIMINARY TECHNICAL DATA a 2-Channel, 2.35 V to 5.25 V, 250 KSPS,10-/12-Bit ADCs AD7911/AD7921 Preliminary Technical Data FEATURES Throughput Rate: 250 KSPS Specified for VDD of 2.35 V to 5.25 V Low Power: TBD mW typ at 250 KSPS with 3V Supplies TBD mW typ at 250 KSPS with 5V Supplies
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10-/12-Bit
AD7911/AD7921
100kHz
MO-193BA
MO-187AA
VT235
AD7911
AD7921
DB10
chn 135
CHN 804
ad7802
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CHN 617
Abstract: IE1000-4-2
Text: BACK a EMI/EMC Compliant, ±15 kV ESD Protected, RS-232 Line Drivers/Receivers ADM14185E FEATURES Complies with 89/336/EEC EMC Directive ESD Protection to IEC1000-4-2 801.2 ±8 kV: Contact Discharge ±15 kV: Air-Gap Discharge ±15 kV: Human Body Model Low Quiescent Current
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RS-232
ADM14185E
89/336/EEC
IEC1000-4-2
IEC1000-4-4)
EN55022)
EIA/TIA-232-E
ADM14196E
DS14185
CHN 617
IE1000-4-2
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ADM2209E
Abstract: EIA-232 IEC1000-4-2 IEC1000-4-4 C2137 ADM2209EARU
Text: a EMI/EMC Compliant, 15 kV ESD Protected, Dual RS-232 Port with Standby Advance Product Information ADM2209E FEATURES Two Complete Serial Ports, 6 Drivers and10 Receivers Operates with 3V or 5V Logic Low Power CMOS: 2mA Operation Low Standby Current: 100µA
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RS-232
ADM2209E
ADM2209E
38-pin
and10
460kbit/s
RU-38)
EIA-232
IEC1000-4-2
IEC1000-4-4
C2137
ADM2209EARU
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PDF
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AD1847
Abstract: ADSP2187L ADSP-2187L ADSP-2100 Family EZ-Tools ADSP-2100 ADSP-2181 ADSP-2100 Family Development Tools
Text: a FEATURES PERFORMANCE 25 ns Instruction Cycle Time @ 3.3 Volts, 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions
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ADSP-2100
ADSP-2187L
ADSP2187L
AD1847
ADSP-2100 Family EZ-Tools
ADSP-2181
ADSP-2100 Family Development Tools
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CHN 617
Abstract: block diagram for barrel shifter ADSP-2187L
Text: BACK a FEATURES PERFORMANCE 25 ns Instruction Cycle Time @ 3.3 Volts, 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in Every Instruction Cycle Multifunction Instructions
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ADSP-2100
ADSP-2187L
ADSP2187L
CHN 617
block diagram for barrel shifter
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Digital Alarm Clock using 8051
Abstract: chn 448 chn 706 CHN 632 CHN 703 RAM 2112 256 word 32.768mhz pin hole thru chn 608 microcontroller 8051 application of alarm clock octal tri state buffer ic
Text: áç XRT84L38 OCTAL T1/E1/J1 FRAMER FEBRUARY 2004 REV. 1.0.0 GENERAL DESCRIPTION The XRT84L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framing controller. The XRT84L38 contains an integrated DS1/E1/J1 framer which provides DS1/E1/J1 framing and error accumulation in accordance with ANSI/ITU_T specifications.
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XRT84L38
XRT84L38
Digital Alarm Clock using 8051
chn 448
chn 706
CHN 632
CHN 703
RAM 2112 256 word
32.768mhz pin hole thru
chn 608
microcontroller 8051 application of alarm clock
octal tri state buffer ic
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PDF
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CHN G4 136
Abstract: chn7 SA8 357 TR54016 XRT83L38 XRT84L38 XRT84L38IB 7174B 8ch LOW SATURATION DRIVER C1-168
Text: XRT84L38 OCTAL T1/E1/J1 FRAMER SEPTEMBER 2006 REV. 1.0.1 GENERAL DESCRIPTION The XRT84L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framing controller. The XRT84L38 contains an integrated DS1/E1/J1 framer which provides DS1/E1/J1 framing and error
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XRT84L38
XRT84L38
CHN G4 136
chn7
SA8 357
TR54016
XRT83L38
XRT84L38IB
7174B
8ch LOW SATURATION DRIVER
C1-168
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rbs 6201 manual
Abstract: rbs 6201 POWER CONSUMPTION chn 452 rbs 6201 specification chn 710 SCR PIN CONFIGURATION CHN 035 RBS 6201 INFORMATION SDH 209 rbs 6201 LOP 36 AF
Text: XRT86L38 PRELIMINARY PRELIMINARY OCTAL T1/E1/J1 FRAMER/LIU COMBO NOVEMBER 2003 REV. P1.0.4 GENERAL DESCRIPTION The XRT86L38 is an eight-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution. The XRT86L38 contains an integrated DS1/
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XRT86L38
XRT86L38
TR54016,
G-703,
rbs 6201 manual
rbs 6201 POWER CONSUMPTION
chn 452
rbs 6201 specification
chn 710
SCR PIN CONFIGURATION CHN 035
RBS 6201 INFORMATION
SDH 209
rbs 6201
LOP 36 AF
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1/CHN 326
Abstract: No abstract text available
Text: 21Ü 2 Megabit 256K x 8 Multi-Purpose Flash SST39SF020 Data Sheet FEATURES: • • • Organized as 256 K X 8 Fast Sector Erase and Byte Program: Single 5.0V Read and Write Operations - Superior Reliability - • • Active Current: 20 mA (typical) Standby Current: 10 |iA (typical)
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SST39SF020
1/CHN 326
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CHN 816
Abstract: chn 823 chn 817 ST CHN 510 1300-CSM BT225 CHN 823 diode CHN 510 SLC-500 ST CHN t4
Text: Print I/O Ink, Damp and Register Modules Catalog Number 1300-GDI, 1300-CCM, 1300-PWM and 1300-CSM Technical Data Typical Print I/O Arrangement Dedicated Purpose and Functionality. Print I/O is a t0WTC0St modular I/O system for specific applications that offer all the functions
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1300-GDI,
1300-CCM,
1300-PWM
1300-CSM)
130Q-TD001A-US-P
1300-TD001
CHN 816
chn 823
chn 817
ST CHN 510
1300-CSM
BT225
CHN 823 diode
CHN 510
SLC-500
ST CHN t4
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PDF
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Untitled
Abstract: No abstract text available
Text: 21Ü 16 Megabit FlashBank Memory SST38UF166 Advance Information FEATURES: • • • Single 2.2-2.8V Read and Write Operations Read Access Time Separate Memory Banks for Code or Data - - Latched Address and Data Superior Reliability End of Write Detection
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SST38UF166
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PDF
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