Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    1 BIT SRAM Search Results

    1 BIT SRAM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MD2114A-5 Rochester Electronics LLC SRAM Visit Rochester Electronics LLC Buy
    HM3-6504B-9 Rochester Electronics LLC Standard SRAM, 4KX1, 220ns, CMOS, PDIP18 Visit Rochester Electronics LLC Buy
    HM1-6516-9 Rochester Electronics LLC Standard SRAM, 2KX8, 200ns, CMOS, CDIP24 Visit Rochester Electronics LLC Buy
    27S03ADM/B Rochester Electronics LLC 27S03A - SRAM Visit Rochester Electronics LLC Buy
    29705/BXA Rochester Electronics LLC 29705 - SRAM Visit Rochester Electronics LLC Buy

    1 BIT SRAM Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    K7J321882M

    Abstract: K7J321882M-FC16 K7J321882M-FC20 K7J321882M-FC25 K7J323682M K7J323682M-FC16 K7J323682M-FC20 K7J323682M-FC25
    Text: K7J323682M K7J321882M K7J320882M Preliminary 1Mx36 & 2Mx18 & 4Mx8 DDR II SIO b2 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. July, 15 200 1 Advance 0.1 1. 2. 3. 4.


    Original
    K7J323682M K7J321882M K7J320882M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, K7J321882M K7J321882M-FC16 K7J321882M-FC20 K7J321882M-FC25 K7J323682M K7J323682M-FC16 K7J323682M-FC20 K7J323682M-FC25 PDF

    Untitled

    Abstract: No abstract text available
    Text: K7J323682M K7J321882M K7J320882M Preliminary 1Mx36 & 2Mx18 & 4Mx8 DDR II SIO b2 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. July, 15 200 1 Advance 0.1 1. 2. 3. 4.


    Original
    K7J323682M K7J321882M K7J320882M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, PDF

    Untitled

    Abstract: No abstract text available
    Text: K7I323684M K7I321884M K7I320884M Preliminary 1Mx36 & 2Mx18 & 4Mx8 DDRII CIO b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit DDRII CIO b4 SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. October, 22 2001 Advance 0.1 1.


    Original
    K7I323684M K7I321884M K7I320884M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, PDF

    AC 220 to DC 14v 10A

    Abstract: No abstract text available
    Text: K7I323682M K7I321882M K7I320882M Preliminary 1Mx36 & 2Mx18 & 4Mx8 DDRII CIO b2 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit DDRII CIO b2 SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. October, 22 2001 Advance 0.1 1.


    Original
    K7I323682M K7I321882M K7I320882M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, AC 220 to DC 14v 10A PDF

    Untitled

    Abstract: No abstract text available
    Text: K7J323682M K7J321882M K7J320882M 1Mx36 & 2Mx18 & 4Mx8 DDR II SIO b2 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. July, 15 200 1 Advance 0.1 1. 2. 3. 4. 5. 6. Dec, 14 2001


    Original
    K7J323682M K7J321882M K7J320882M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, PDF

    samsung pd

    Abstract: K7I320884M K7I321884M K7I321884M-FC16 K7I321884M-FC20 K7I321884M-FC25 K7I323684M K7I323684M-FC16 K7I323684M-FC20 K7I323684M-FC25
    Text: K7I323684M K7I321884M K7I320884M Preliminary 1Mx36 & 2Mx18 & 4Mx8 DDRII CIO b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit DDRII CIO b4 SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. October, 22 2001 Advance 0.1 1.


    Original
    K7I323684M K7I321884M K7I320884M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, samsung pd K7I320884M K7I321884M K7I321884M-FC16 K7I321884M-FC20 K7I321884M-FC25 K7I323684M K7I323684M-FC16 K7I323684M-FC20 K7I323684M-FC25 PDF

    K7I321882M-FC25

    Abstract: K7I323682M-FC25 T 3H K7I320882M K7I321882M K7I321882M-FC16 K7I321882M-FC20 K7I323682M K7I323682M-FC16 K7I323682M-FC20
    Text: K7I323682M K7I321882M K7I320882M Preliminary 1Mx36 & 2Mx18 & 4Mx8 DDRII CIO b2 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit DDRII CIO b2 SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. October, 22 2001 Advance 0.1 1.


    Original
    K7I323682M K7I321882M K7I320882M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, K7I321882M-FC25 K7I323682M-FC25 T 3H K7I320882M K7I321882M K7I321882M-FC16 K7I321882M-FC20 K7I323682M K7I323682M-FC16 K7I323682M-FC20 PDF

    K7R320884M

    Abstract: K7R321884M K7R321884M-FC20 K7R321884M-FC25 K7R323684M K7R323684M-FC16 K7R323684M-FC20 K7R323684M-FC25
    Text: K7R323684M K7R321884M K7R320884M Preliminary 1Mx36 & 2Mx18 & 4Mx8 QDR TM II b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit QDRTM II b4 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. June 30, 2001 Advance 0.1 1. Package dimension modify.


    Original
    K7R323684M K7R321884M K7R320884M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, 13mmx15mm 15mmx17mm -FC25 K7R320884M K7R321884M K7R321884M-FC20 K7R321884M-FC25 K7R323684M K7R323684M-FC16 K7R323684M-FC20 K7R323684M-FC25 PDF

    K7R641882M-FC20

    Abstract: K7R643682M-FC20 K7R641882M-FC16 K7R643682M-FC16 K7R641882M-FC25 K7R643682M-FC25 K7R643682M K7R640982M K7R641882M K7R641882MFC25
    Text: K7R643682M K7R641882M K7R640982M Preliminary 2Mx36 & 4Mx18 & 8Mx9 QDRTM II b2 SRAM Document Title 2Mx36-bit, 4Mx18-bit, 8Mx9-bit QDRTM II b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Sep, 14 2002 Advance 0.1 1. Update AC timing characteristics.


    Original
    K7R643682M K7R641882M K7R640982M 2Mx36 4Mx18 2Mx36-bit, 4Mx18-bit, K7R641882M-FC20 K7R643682M-FC20 K7R641882M-FC16 K7R643682M-FC16 K7R641882M-FC25 K7R643682M-FC25 K7R643682M K7R640982M K7R641882M K7R641882MFC25 PDF

    mask rom

    Abstract: No abstract text available
    Text: MOS INTEGRATED CIRCUIT µPD26411 1 M-BIT SRAM AND 2M-BIT MASK ROM COMBO CHIP SRAM 128K-WORD BY 8-BIT / MASK ROM (256K-WORD BY 8-BIT) Please consult with our sales offices for data sheet.


    Original
    PD26411 128K-WORD 256K-WORD mask rom PDF

    K7R320884M

    Abstract: K7R321884M K7R321884M-FC20 K7R321884M-FC25 K7R323684M K7R323684M-FC16 K7R323684M-FC20 K7R323684M-FC25 Q34D
    Text: K7R323684M K7R321884M K7R320884M 1Mx36 & 2Mx18 & 4Mx8 QDR TM II b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit QDRTM II b4 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. June 30, 2001 Advance 0.1 1. Package dimension modify.


    Original
    K7R323684M K7R321884M K7R320884M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, 13mmx15mm 15mmx17mm -FC25 K7R320884M K7R321884M K7R321884M-FC20 K7R321884M-FC25 K7R323684M K7R323684M-FC16 K7R323684M-FC20 K7R323684M-FC25 Q34D PDF

    Untitled

    Abstract: No abstract text available
    Text: K7R323684M K7R321884M K7R320884M Preliminary 1Mx36 & 2Mx18 & 4Mx8 QDRTM II b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit QDRTM II b4 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. June 30, 2001 Advance 0.1 1. Package dimension modify.


    Original
    K7R323684M K7R321884M K7R320884M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, 13mmx15mm 15mmx17mm PDF

    IR 10D 8A

    Abstract: No abstract text available
    Text: K7R323684M K7R321884M K7R320884M Preliminary 1Mx36 & 2Mx18 & 4Mx8 QDRTM II b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit QDRTM II b4 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. June 30, 2001 Advance 0.1 1. Package dimension modify.


    Original
    K7R323684M K7R321884M K7R320884M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, 13mmx15mm 15mmx17mm IR 10D 8A PDF

    Untitled

    Abstract: No abstract text available
    Text: K7R323684M K7R321884M K7R320884M Preliminary 1Mx36 & 2Mx18 & 4Mx8 QDR TM II b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit QDRTM II b4 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. June 30, 2001 Advance 0.1 1. Package dimension modify.


    Original
    K7R323684M K7R321884M K7R320884M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, 13mmx15mm 15mmx17mm PDF

    Untitled

    Abstract: No abstract text available
    Text: K7I323684M K7I321884M K7I320884M 1Mx36 & 2Mx18 & 4Mx8 DDRII CIO b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit DDRII CIO b4 SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. October, 22 2001 Advance 0.1 1. 2. 3. 4. 5.


    Original
    K7I323684M K7I321884M K7I320884M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit, PDF

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI LSIs M 5 M 4 V 1 6 1 6 9 T P - 1 0 ,- 1 2 ,- 1 5 16M CDRAM16M 1024K-WORD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M5M4V16169TP is a 16M-bit Cached DRAM which integrates input registers, a 1048576-word by 1 6 - bit


    OCR Scan
    CDRAM16M 1024K-WORD 16-BIT 1024-WORD M5M4V16169TP 16M-bit 1048576-word PDF

    m5m5v1132

    Abstract: No abstract text available
    Text: MITSUBISHI LSIs M 5 M 5 V 1 1 3 2 F P -6 ,-7 ,-8 ,-1 0 , -7 L ,-8 L ,-1 0 L 1048576-BIT 32768-WQRP BY 32-BIT SYNCHRONOUS BURST SRAM DESCRIPTION The M5M5V1132FP is a family of 1M bit synchronous SRAMs organized as 32768-words of 32-bit. The M5M5V1132FP provides


    OCR Scan
    1048576-BIT 32768-WQRP 32-BIT) M5M5V1132FP 32768-words 32-bit. m5m5v1132 PDF

    M5M4V4169TP20

    Abstract: mitsubishi cdram M5M4V4169TP sram 3.3 16bit
    Text: MITSUBISHI LSIs M5M4V4169TP-15,-20 4M 256K-WORD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M5M 4V4169TP is a 4 M - b it Cached DRAM which integrates input registers, a 262, 1 44-w o rd by 1 6 - bit dynamic memory array and a 1 0 2 4 -word by 1 6 - bit static


    OCR Scan
    M5M4V4169TP-15 256K-WORD 16-BIT 1024-WORD 4V4169TP M5M4V4169TP20 mitsubishi cdram M5M4V4169TP sram 3.3 16bit PDF

    sram 3.3 16bit

    Abstract: No abstract text available
    Text: MITSUBISHI LSIs M5M4V4169TP-15,-20 4M 256K-WORD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M5M4V4169TP is a 4 M - b it Cached DRAM which integrates input registers, a 262, 1 4 4 - word by 1 6 - bit dynamic memory array and a 1 0 2 4 -word by 1 6 - bit static


    OCR Scan
    M5M4V4169TP-15 256K-WORD 16-BIT 1024-WORD M5M4V4169TP 40P0K J40-P-400-1 sram 3.3 16bit PDF

    M5M4V16169TP-10

    Abstract: mitsubishi scr
    Text: MITSUBISHI LSIs M 5M 4V16169TP-10,-12,-15,-20 16M 1M-W0RD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M 5 M 4V 161 69T P is a 16M - bit Cached DRAM which integrates input registers, a 1 0 4 8 5 7 6 - w ord by 1 6 - bit dynamic m em ory array and a 1 0 2 4 - w ord by 1 6 - bit static


    OCR Scan
    4V16169TP-10 16-BIT 1024-WORD M5M4V16169TP-10 mitsubishi scr PDF

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI LSIs M5M4V4169TP-15,-20 4M 256K-WORD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M5M4V4169TP is a 4 M - b it Cached DRAW which integrates input registers, a 262, 1 4 4 - word by 1 6 - bit dynamic memory array and a 1024-w o rd by 1 6 - bit static


    OCR Scan
    M5M4V4169TP-15 256K-WORD 16-BIT 1024-WORD M5M4V4169TP 1024-w 4V4169TP-15 4V4169TP-20 D054772 PDF

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET_ MOS INTEGRATED CIRCUIT UPD43 4 0 0 1 A 4M-BIT CMOS FAST SRAM 4M-WORD BY 1-BIT Description The ^¡PD434001A is a high speed, low power, 4,194,304 bits 4,194,304 words by 1 bit CMOS static RAM. Operating supply voltage is 5.0 V ± 0.5 V.


    OCR Scan
    UPD43 PD434001A 32-pin PD434001 ALE-17 ALE-20 PDF

    mitsubishi scr

    Abstract: M5M4V4169
    Text: MITSUBISHI LSIs M5M4V4169TP-15,-20 4M 256K-WORD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION Ths M 5 M 4V 416 9T P integrates input is a 4 M - b it Cached DRAM registers, a 2 6 2 , 1 4 4 - w o r d by which 1 6 - bit dynamic memory array and a 1 0 2 4 -w ord by 1 6 - bit static


    OCR Scan
    M5M4V4169TP-15 256K-WORD 16-BIT 1024-WORD mitsubishi scr M5M4V4169 PDF

    mitsubishi cdram

    Abstract: M5M4V16169TP-10
    Text: MITSUBISHI LSIs M 5 M 4 V 1 6 1 6 9 T P -1 0 ,-1 2 ,-1 5 16M CDRAM16M 1024K-WORD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M 5 M 4 V 1 6 1 6 9 T P is a 1 6 M -b it Cached DRAM which integrates input registers, a 1 0 4 8 5 7 6 - w ord by 1 6 - bit


    OCR Scan
    CDRAM16M 1024K-WORD 16-BIT 1024-WORD mitsubishi cdram M5M4V16169TP-10 PDF