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101463B Abstract: fractional N PLL S619 S620 S621 S622 S614 Text: WHITE PAPER Basics of Dual Fractional-N Synthesizers/PLLs speed up or slow down the VCO in case of a frequency difference between the two incoming signals to the PFD. When the loop reaches lock condition, the frequency of the generated signal is also equal to that of the reference.	Original	PDF	101463B 101463B fractional N PLL S619 S620 S621 S622 S614

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101463B

Abstract: fractional N PLL S619 S620 S621 S622 S614
Text: WHITE PAPER Basics of Dual Fractional-N Synthesizers/PLLs speed up or slow down the VCO in case of a frequency difference between the two incoming signals to the PFD. When the loop reaches lock condition, the frequency of the generated signal is also equal to that of the reference.

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101463B 101463B fractional N PLL S619 S620 S621 S622 S614