Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    102H CBE Search Results

    102H CBE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    UPD78F0102HMC(A1)-5A4-A Renesas Electronics Corporation Compact, Low-power 8-bit Microcontrollers for General Purpose Applications (Non Promotion), , / Visit Renesas Electronics Corporation
    UPD78F0102HMC-5A4 Renesas Electronics Corporation Compact, Low-power 8-bit Microcontrollers for General Purpose Applications (Non Promotion), LSSOP, /Embossed Tape Visit Renesas Electronics Corporation
    DF38102HWV Renesas Electronics Corporation 8-bit Microcomputers (Non Promotion), QFP, / Visit Renesas Electronics Corporation
    DF38102HV Renesas Electronics Corporation 8-bit Microcomputers (Non Promotion), QFP, / Visit Renesas Electronics Corporation
    UPD78F0102HMC-5A4-A Renesas Electronics Corporation Compact, Low-power 8-bit Microcontrollers for General Purpose Applications (Non Promotion) Visit Renesas Electronics Corporation

    102H CBE Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    ZL50012QCG1

    Abstract: MS-026 ZL50012 STO10
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features • April 2006 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection


    Original     		ZL50012 512-ch ZL50012/QCC ZL50012/GDC ZL50012QCG1 ZL50012GDG2 ZL50012QCG1 MS-026 ZL50012 STO10 PDF

    MS-026

    Abstract: ZL50012 TFPW0 sto8b
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection


    Original     		ZL50012 512-ch STi0-15 IEEE-1149 STo0-15 STOHZ0-15 MS-026 ZL50012 TFPW0 sto8b PDF

    DS5722

    Abstract: No abstract text available
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection


    Original     		ZL50012 512-ch 048Mb/s, 096Mb/s 192Mb/s DS5722 PDF

    MS-026

    Abstract: ZL50012
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features July 2004 • 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection


    Original     		ZL50012 512-ch ZL50012/QCC ZL50012/GDC MS-026 ZL50012 PDF

    MS-026

    Abstract: ZL50012 philips e3 STO11 ci 116h 4094m
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection


    Original     		ZL50012 512-ch STi0-15 IEEE-1149 STo0-15 STOHZ0-15 MS-026 ZL50012 philips e3 STO11 ci 116h 4094m PDF

    BC1211

    Abstract: No abstract text available
    Text: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features July 2005 • 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection


    Original     		ZL50012 512-ch BC1211 PDF

    md 5408

    Abstract: SCAT CODE 4448 PCIM 164 GE 8352 HD 5888 7830A 8352 GE ge 5216 transistor 8mx32 simm 72 pin ic 8237 dma controler
    Text: STPC CLIENT  Multimedia PC on a Chip • POWERFUL X86 PROCESSOR ■ 64-BIT 66MHz BUS INTERFACE ■ 64-BIT DRAM CONTROLLER ■ SVGA GRAPHICS CONTROLLER ■ UMA ARCHITECTURE ■ VIDEO SCALER ■ VIDEO OUTPUT PORT ■ VIDEO INPUT PORT ■ CRT CONTROLLER ■


    Original     		64-BIT 66MHz 135MHz 2C206 PBGA388 md 5408 SCAT CODE 4448 PCIM 164 GE 8352 HD 5888 7830A 8352 GE ge 5216 transistor 8mx32 simm 72 pin ic 8237 dma controler PDF

    GR-1244-CORE

    Abstract: MS-026 ZL50011
    Text: ZL50011 Flexible 512-ch DX with on-chip DPLL Data Sheet Features VDD • • • Applications • • • • • Small and medium digital switching platforms Access Servers Time Division Multiplexers Computer Telephony Integration Digital Loop Carriers VSS


    Original     		ZL50011 512-ch STi0-15 GR-1244-CORE MS-026 ZL50011 PDF

    32.768Mhz oscillator

    Abstract: FOX 20.000 MHZ GR-1244-CORE MS-026 ZL50011 tfk8
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features December 2003 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL


    Original     		ZL50011 GR-1244-CORE 32.768Mhz oscillator FOX 20.000 MHZ MS-026 ZL50011 tfk8 PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features • September 2011 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation Ordering Information ZL50011/GDC 144 Ball LBGA Trays ZL50011QCG1 160 Pin LQFP* Trays, Bake & Drypack


    Original     		ZL50011 ZL50011/GDC ZL50011QCG1 ZL50011GDG2 GR-1244-CORE PDF

    GR-1244-CORE

    Abstract: MS-026 ZL50011
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features December 2003 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL


    Original     		ZL50011 GR-1244-CORE MS-026 ZL50011 PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features July 2005 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL


    Original     		ZL50011 GR-1244-CORE PDF

    ZL50011QCG1

    Abstract: GR-1244-CORE MS-026 ZL50011
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features • March 2006 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation Ordering Information 160 Pin LQFP Trays 144 Ball LBGA Trays 160 Pin LQFP* Trays, Bake & Drypack


    Original     		ZL50011 ZL50011/QCC ZL50011/GDC ZL50011QCG1 ZL50011GDG2 GR-1244-CORE ZL50011QCG1 MS-026 ZL50011 PDF

    GR-1244-CORE

    Abstract: MS-026 ZL50011 11CH marking
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features July 2004 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL


    Original     		ZL50011 GR-1244-CORE MS-026 ZL50011 11CH marking PDF

    Untitled

    Abstract: No abstract text available
    Text: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD • • • • • • • • • RESET Data Memory P/S Converter Output HiZ Control Connection Memory Microprocessor Interface and DPLL OSC Output Timing STo0-15 STOHZ0-15 FPo0 CKo0


    Original     		ZL50010 STi0-15 ZL50010/GDC ZL50010QCG1 ZL50010GDG2 PDF

    GR-1244-CORE

    Abstract: MS-026 ZL50010
    Text: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD Per-stream output channel and output bit delay programming with fractional bit advancement Multiple frame pulse outputs and reference clock outputs Per-channel constant throughput delay


    Original     		ZL50010 STi0-15 ZL50010/QCC ZL50010/GDC IEEE-1149 GR-1244-CORE MS-026 ZL50010 PDF

    ZL50010QCG1

    Abstract: GR-1244-CORE MS-026 ZL50010 32CH1
    Text: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD • • • • • • • • RESET Data Memory P/S Converter Output HiZ Control Connection Memory Microprocessor Interface and DPLL OSC Output Timing STo0-15 STOHZ0-15 FPo0 CKo0


    Original     		ZL50010 STi0-15 ZL50010/QCC ZL50010/GDC ZL50010QCG1 ZL50010GDG2 ZL50010QCG1 GR-1244-CORE MS-026 ZL50010 32CH1 PDF

    GR-1244-CORE

    Abstract: MS-026 ZL50010 TFPW0
    Text: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD Per-stream output channel and output bit delay programming with fractional bit advancement Multiple frame pulse outputs and reference clock outputs Per-channel constant throughput delay


    Original     		ZL50010 STi0-15 ZL50010/QCC ZL50010/GDC IEEE-1149 GR-1244-CORE MS-026 ZL50010 TFPW0 PDF

    FOX 20.000 MHZ

    Abstract: LMT 324 slv ca2 GR-1244-CORE MS-026 ZL50010 STO14 tfk8k
    Text: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD Per-stream output channel and output bit delay programming with fractional bit advancement Multiple frame pulse outputs and reference clock outputs Per-channel constant throughput delay


    Original     		ZL50010 STi0-15 ZL50010/QCC ZL50010/GDC IEEE-1149 FOX 20.000 MHZ LMT 324 slv ca2 GR-1244-CORE MS-026 ZL50010 STO14 tfk8k PDF

    ZL50010

    Abstract: TFR1M GR-1244-CORE MS-026
    Text: ZL50010 Flexible 512-ch DX with Enhanced DPLL Data Sheet Features VDD ZL50010/QCC ZL50010/GDC • • • • • • • • RESET Data Memory P/S Converter Output HiZ Control Connection Memory Microprocessor Interface and DPLL OSC Output Timing STo0-15 STOHZ0-15


    Original     		ZL50010 512-ch STi0-15 ZL50010/QCC ZL50010/GDC IEEE-1149 ZL50010 TFR1M GR-1244-CORE MS-026 PDF

    x86 series

    Abstract: n439 10h13 stpcc0166 schematics IBM 1161 STPCD01 117CP
    Text: STPC CLIENT  PC Compatible Embeded Microprocessor • POWERFUL X86 PROCESSOR • 64-BIT 66MHz BUS INTERFACE • • 64-BIT DRAM CONTROLLER SVGA GRAPHICS CONTROLLER • • UMA ARCHITECTURE VIDEO SCALER • VIDEO OUTPUT PORT • VIDEO INPUT PORT • •


    Original     		64-BIT 66MHz 135MHz PBGA388 x86 series n439 10h13 stpcc0166 schematics IBM 1161 STPCD01 117CP PDF

    TXM TX 2E

    Abstract: 7296 029H 026H md 5408 BT 2323 M ic pin configuration x86 series sil1101 ACES RAMDAC
    Text: STPC INDUSTRIAL  PC Compatible Embeded Microprocessor PRELIMINARY DATA • POWERFUL X86 PROCESSOR ■ 64-BIT BUS ARCHITECTURE ■ 64-BIT 66MHz DRAM CONTROLLER ■ SVGA GRAPHICS CONTROLLER ■ 135MHz RAMDAC ■ UMA ARCHITECTURE ■ TFT DISPLAY CONTROLLER


    Original     		64-BIT 66MHz 135MHz PBGA388 82C206 TXM TX 2E 7296 029H 026H md 5408 BT 2323 M ic pin configuration x86 series sil1101 ACES RAMDAC PDF

    Untitled

    Abstract: No abstract text available
    Text: 23 HARRIS H S P 4 3 1 6 8 Dual FIR Filter A u g u st 1992 Features D escription • Tw o The HSP43168 Dual FIR Filter consists of two independent 8-tap FIR filters. Each filter supports decimation from 1 to 16 and provides on-board storage for 32 sets of coefficients. The Block Diagram shows


    OCR Scan     		HSP43168 HSP43168 PDF

    star delta auto trans wiring diagram

    Abstract: md 5408 VIDEO DISPLAY CONTROLLER CD 5888 CD 5888 CB SCAT CODE 4448 intel Chipset CRB Schematics 452 s90 7830A 83610 pir 815
    Text: STPC CLIENT Multimedia PC on a Chip • POWERFUL X86 PROCESSOR ■ 64-BIT 66MHz BUS INTERFACE ■ 64-BIT DRAM CONTROLLER ■ SVGA GRAPHICS CONTROLLER ■ UMA ARCHITECTURE ■ VIDEO SCALER ■ VIDEO OUTPUT PORT ■ VIDEO INPUT PORT ■ CRT CONTROLLER ■ 135MHz RAMDAC


    OCR Scan     		64-BIT 66MHz 135MHz PBGA388 star delta auto trans wiring diagram md 5408 VIDEO DISPLAY CONTROLLER CD 5888 CD 5888 CB SCAT CODE 4448 intel Chipset CRB Schematics 452 s90 7830A 83610 pir 815 PDF