122MHZ Search Results

21071AA

Abstract: 21A04-B0 21a04 Alpha 21064-BB 21164-P6
Contextual Info: Alpha 64-bit Microprocessor Fact Sheet: Alpha 21164 Microprocessor NEW NEW 300MHz 8.7 8.7 20-100MHz 366MHz 11.3 14.5 25-122MHz 433MHz 13.3 18.3 29-144MHz 500MHz 15.4 21.1 33166MHz Off Chip Cache Manuf. Process 8KB 8KB 96K 1 MB 0.35 micron 8KB 8KB 96K 1 MB

7591 tube

Abstract: 1144C AN 7591 ICS813321-04 ICS813321AG-04 ICS813321AG-04T OC48 ICS813321AG-04LFT tube 7591 XTAL 4P 20MHz
Contextual Info: ICS813321-04 VCXO W/3.3V, 2.5V LVPECL FEMTOCLOCK PLL GENERAL DESCRIPTION FEATURES The ICS813321-04 is a two stage device – a VCXO ICS followed by a FemtoClock™ PLL. The FemtoClock HiPerClockS™ PLL can multiply the crystal frequency of the VCXO up to a range of 122MHz to 160MHz, with a random

QFN20 5x5 "PCB Layout"

Abstract: EL9115 EL9115IL EL9115IL-T13 EL9115IL-T7 EL9115ILZ EL9115ILZ-T7 analog delay line
Contextual Info: EL9115 October 12, 2006 FN7441.3 Triple Analog Video Delay Line Features The EL9115 is a triple analog delay line that allows skew compensation between any three signals. This part is perfect for compensating for the skew introduced by a typical CAT-5 cable with differing electrical lengths on each pair.

Contextual Info: 19-3631; Rev 1; 4/07 KIT ATION EVALU E L B A IL AVA 14-Bit, 500Msps, Interpolating and Modulating Dual DAC with CMOS Inputs Features The MAX5894 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter DAC offers superior dynamic performance and is optimized for highperformance wideband, single-carrier transmit applications. The device integrates a selectable 2x/4x/8x

INTERPOLATOR SIN COS

Abstract: MAX5893 MAX5894 MAX5894EGK MAX5895 MAX5898
Contextual Info: 19-3631; Rev 0; 4/05 KIT ATION EVALU E L B A AVAIL 14-Bit, 500Msps, Interpolating and Modulating Dual DAC with CMOS Inputs Features The MAX5894 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter DAC offers superior dynamic performance and is optimized for highperformance wideband, single-carrier transmit applications. The device integrates a selectable 2x/4x/8x

Contextual Info: 19-3546; Rev 1; 4/07 KIT ATION EVALU E L B A IL AVA 12-Bit, 500Msps Interpolating and Modulating Dual DAC with CMOS Inputs Features The MAX5893 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter DAC offers superior dynamic performance and is optimized for highperformance wideband, single-carrier transmit applications. The device integrates a selectable 2x/4x/8x

TB0754A

Abstract: 754 PIN 1-132MHz
Contextual Info: TAI-SAW TECHNOLOGY CO., LTD. No. 3, Industrial 2nd Rd., Ping-Chen Industrial District, Taoyuan, 324, Taiwan, R.O.C. TEL: 886-3-4690038 FAX: 886-3-4697532 E-mail: tstsales@mail.taisaw.com Web: www.taisaw.com SAW Filter 104 MHz BW=20MHz SMD 13.3mmX6.5mm MODEL NO.: TB0754A

CK410B

Abstract: ICS932S421 CK509B CK410B datasheet PEC 816 932S509EKLF idt ck509b ICS9EX21801 932S421CGLF ICS932
Contextual Info: DATASHEET ICS9EX21801A 18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux Description Features/Benefits The ICS9EX21801 provides 18 output clocks for PCIe Gen2 100MHz or QPI (133MHz) applications. The 9EX21801 has 4 selectable SMBus addresses, and dedicated CKPWRGD/PD#

Contextual Info: 19-5214; Rev 0; 4/10 Spread-Spectrum Clock Generators The MAX31C80/MAX31D80 are spread-spectrum clock generators that contain a phase-locked loop PLL that generates a 2MHz to 134MHz clock from an input clock or crystal. The PLL can provide a spread-spectrum down-dithered (MAX31D80) or center-dithered

INTERPOLATOR SIN COS

Abstract: AV RF Modulator wireless MAX5893 MAX5894 MAX5894EGK MAX5894EGK-D MAX5895 MAX5898
Contextual Info: 19-3631; Rev 2; 10/08 KIT ATION EVALU LE B A IL A AV 14-Bit, 500Msps, Interpolating and Modulating Dual DAC with CMOS Inputs Features The MAX5894 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter DAC offers superior dynamic performance and is optimized for highperformance wideband, single-carrier transmit applications. The device integrates a selectable 2x/4x/8x

MAX5893

Abstract: MAX5894 MAX5895 MAX5895EGK MAX5895EGK-D MAX5898 6Fs 51
Contextual Info: 19-3545; Rev 2; 10/08 KIT ATION EVALU E L B AVAILA 16-Bit, 500Msps Interpolating and Modulating Dual DAC with CMOS Inputs The MAX5895 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter DAC offers superior dynamic performance and is optimized for

CK410B datasheet

Abstract: Frequency Generator 10kHz db1200GS 9FG1200 ICS932S421 DB1200G CK410 CK410B 9DB104 ICS9FG1200-1
Contextual Info: DATASHEET ICS9FG1200D-1 Frequency Generator for Intel CPU, PCIe Gen2* & Fully Buffered DIMM Clocks Description Features/Benefits ICS9FG1200-1 follows the Intel DB1200GS Differential Buffer Specification. This buffer provides 12 output clocks for CPU Host Bus, PCIe Gen2, or Fully Buffered DIMM applications. The outputs

11dBm

Abstract: MAX5893 MAX5894 MAX5895 MAX5898 MAX5898EGK MAX5898EGK-D MAX5898EVKIT modulators DD18
Contextual Info: 19-3756; Rev 2; 8/10 KIT ATION EVALU LE B A IL A AV 16-Bit, 500Msps, Interpolating and Modulating Dual DAC with Interleaved LVDS Inputs Features The MAX5898 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter DAC offers superior dynamic performance and is optimized for highperformance wideband, single- and multicarrier transmit

LTC521

Abstract: LTC215X-14
Contextual Info: LTC2152-14/ LTC2151-14/LTC2150-14 14-Bit 250Msps/ 210Msps/170Msps ADCs Features Description n n n n n n n n n n n The LTC 2152-14/LTC2151-14/LTC2150-14 are 250Msps/ 210Msps/170Msps 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals.

LTC2156UP-12

Abstract: transformer 220 12v LTC2157UP-12
Contextual Info: LTC2157-12/ LTC2156-12/LTC2155-12 Dual 12-Bit 250Msps/ 210Msps/170Msps ADCs FEATURES DESCRIPTION n n n n n n n n n n n The LTC 2157-12/LTC2156-12/LTC2155-12 are a family of dual 250Msps/210Msps/170Msps 12-bit A/D converters designed for digitizing high frequency, wide dynamic range

9FG1200

Abstract: 932S421 p 1138b
Contextual Info: DATASHEET ICS9FG1200D-1 Frequency Gearing Clock for CPU, PCIe Gen1, Gen2 & FBD Description Features/Benefits ICS9FG1200-1 follows the Intel DB1200GS Differential Buffer Specification. This buffer provides 12 output clocks for CPU Host Bus, PCIe Gen2, or Fully Buffered DIMM applications. The outputs

122MHz VCXO

Contextual Info: PRELIMINARY ICS813321I-04 VCXO W/3.3V, 2.5V LVPECL FEMTOCLOCK PLL GENERAL DESCRIPTION FEATURES The ICS813321I-04 is a two stage device – a VCXO ICS followed by a FemtoClock™PLL. The FemtoClock PLL HiPerClockS™ can multiply the crystal frequency of the VCXO up

Contextual Info: 19-3631; Rev 2; 10/08 KIT ATION EVALU LE B A IL A AV 14-Bit, 500Msps, Interpolating and Modulating Dual DAC with CMOS Inputs Features The MAX5894 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter DAC offers superior dynamic performance and is optimized for highperformance wideband, single-carrier transmit applications. The device integrates a selectable 2x/4x/8x

GFEB4

Abstract: GFMB3 GFMB6 GFWB3 gfmb7 gfmb5 gfwb7 GFJB3 GUVS04 GUVS02
Contextual Info: Printed Filters & Dielectric Filters For FM Radio & TV Bands Country Shape Type Over seas Leaded GFMB3 GFWE2 GFMB6 GFMB5 GFMB7 GFMB1 GFWE1 GFWB3 GFKE2 GFWB7 GFWB1 GFKE1 GFJB3 GFWB4 GBP154B1 GFTB3 GFCB3 GFEB4 GFEB3 GTVSB1 GTVS03 GTVS05 GTVS04 GTVS02 GUVS02

Contextual Info: ICS9FG1904B-1 Integrated Circuit Systems, Inc. Frequency Generator for CPU, PCIe Gen 1, PCIe Gen 2 & FBD Recommended Application: Functionality at Power Up PLL Mode CLK_IN (CPU FSB) 1 FS_A_410 MHz 1 100 <= CLK_IN < 200 200<= CLK_IN <= 400 DB1900GS/GSO with 15:4 output grouping

Contextual Info: DATASHEET 1 5 Out put PCI e G2 /QPI Diffe re nt ia l Buffe r w it h 2 :1 I nput M ux 9 EX 2 1 5 0 1 A Description Features/Benefits: The ICS9EX21501 provides 15 output clocks for PCIe Gen2 100MHz or QPI (133MHz) applications. A differential CPU clock from a CK410B+ main clock generator, such as the ICS932S421,

1386A

Abstract: SMBA 27 9FG1901HKLFT
Contextual Info: DATASHEET 9FG1901H Frequency Gearing Clock for CPU, PCIe Gen1 & FBD Description Features/Benefits The 9FG1901H follows the Intel DB1900G Differential Buffer Specification. This buffer provides 19 output clocks for CPU Host Bus, PCI-Express, or Fully Buffered DIMM applications. The outputs

Motorola 9860

Contextual Info: Dual, 16-Bit, 1230 MSPS, TxDAC+ Digital-to-Analog Converter AD9146 Data Sheet FEATURES The AD9146 TxDAC+ includes features optimized for direct conversion transmit applications, including complex digital modulation, and gain and offset compensation. The DAC outputs

db1200GS

Abstract: CK410B CK410B datasheet CK410 ICS9FG1904B-1 9FG1200 ICS9FG1904 DB1900GS 9FG1200-1
Contextual Info: ICS9FG1904B-1 Integrated Circuit Systems, Inc. Frequency Generator for CPU, PCIe Gen 1, PCIe Gen 2 & FBD Recommended Application: Functionality at Power Up PLL Mode CLK_IN (CPU FSB) 1 FS_A_410 MHz 1 100 <= CLK_IN < 200 200<= CLK_IN <= 400 DB1900GS/GSO with 15:4 output grouping