P-TSOPII-54
Abstract: PC133 registered reference design
Text: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • High Performance: • Multiple Burst Read with Single Write Operation -7 -7.5 -8 Units fCK 143 133 125 MHz • Automatic and Controlled Precharge Command tCK3 7 7.5 8 ns • Data Mask for Read/Write Control (x4, x8)
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PDF
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39S128400/800/160CT
128-MBit
P-TSOPII-54
PC133 registered reference design
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smd marking T22
Abstract: smd transistor marking ba 128M-BIT P-TSOPII-54 P-TSOP-54 PC133 registered reference design 128-MBIT
Text: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: -7 -7.5 -8 Units • Automatic and Controlled Precharge Command fCK 143 133 125 MHz • Data Mask for Read/Write Control (x4, x8)
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Original
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PDF
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39S128400/800/160CT
128-MBit
smd marking T22
smd transistor marking ba
128M-BIT
P-TSOPII-54
P-TSOP-54
PC133 registered reference design
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P-TSOPII-54
Abstract: No abstract text available
Text: HYB 39S128400/800/160DT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM Preliminary Target Specification 10.01 High Performance: • Multiple Burst Read with Single Write Operation -6 -7 -7.5 -8 Units fCK 166 143 133 125 MHz • Automatic and Controlled Precharge
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Original
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PDF
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39S128400/800/160DT
128-MBit
HYB39S128400/800/160DT
P-TSOPII-54
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Untitled
Abstract: No abstract text available
Text: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: -7 -7.5 -8 Units • Automatic and Controlled Precharge Command fCK 143 133 125 MHz • Data Mask for Read/Write Control (x4, x8)
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Original
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PDF
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39S128400/800/160CT
128-MBit
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smd marking T22
Abstract: PC133-222-520
Text: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • High Performance: • Multiple Burst Read with Single Write Operation -7 -7.5 -8 Units fCK 143 133 125 MHz • Automatic and Controlled Precharge Command tCK3 7 7.5 8 ns • Data Mask for Read/Write Control (x4, x8)
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Original
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PDF
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39S128400/800/160CT
128-MBit
smd marking T22
PC133-222-520
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smd CA-Y
Abstract: P-TSOPII-54 smd CAY
Text: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 Units fCK 133 125 MHz tCK3 7.5 8 ns tAC3 5.4 6 ns
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Original
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PDF
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39S128400/800/160CT
128-MBit
SPT03933
smd CA-Y
P-TSOPII-54
smd CAY
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HYB 39S128160CT-7
Abstract: HYB 39S128800CT-7 HYB 39S128160CT-7.5
Text: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: -7 -7.5 -8 Units • Automatic and Controlled Precharge Command fCK 143 133 125 MHz • Data Mask for Read/Write Control (x4, x8)
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Original
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PDF
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39S128400/800/160CT
128-MBit
P-TSOPII-54
400mil
PC100
P-TSOPII-54
GPX09039
HYB 39S128160CT-7
HYB 39S128800CT-7
HYB 39S128160CT-7.5
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