SN74LVC1G79-EP
Abstract: No abstract text available
Text: SN74LVC1G79 SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES220S – APRIL 1999 – REVISED NOVEMBER 2007 FEATURES 1 • Available in the Texas Instruments NanoFree Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V
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SN74LVC1G79
SCES220S
000-V
A114-A)
A115-A)
24-mA
SN74LVC1G79-EP
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Untitled
Abstract: No abstract text available
Text: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V
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SN74AHCT1G00
SCLS316M
000-V
A114-A)
A115-A)
OT-23)
SC-70)
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Untitled
Abstract: No abstract text available
Text: SN74LVC1G126 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT www.ti.com SCES224N – APRIL 1999 – REVISED FEBRUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC1G126
SCES224N
24-mA
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AHCT1G02 SINGLE 2-INPUT POSITIVE-NOR GATE SCLS341K – APRIL 1996 – REVISED FEBRUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 6.5 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V
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SN74AHCT1G02
SCLS341K
000-V
A114-A)
A115-A)
OT-23)
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C101
Abstract: SN74LVC2G17 SN74LVC2G17DBVR SN74LVC2G17YZPR TOP-SIDE MARKING c17
Text: SN74LVC2G17 DUAL SCHMITT-TRIGGER BUFFER www.ti.com SCES381G – JANUARY 2002 – REVISED FEBRUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC2G17
SCES381G
24-mA
000-V
A114-A)
C101
SN74LVC2G17
SN74LVC2G17DBVR
SN74LVC2G17YZPR
TOP-SIDE MARKING c17
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SN74AHC1G86DBVR
Abstract: A115-A C101 SN74AHC1G86 marking A86 SN74AHC1G86-EP
Text: SN74AHC1G86 SINGLE 2ĆINPUT EXCLUSIVEĆOR GATE SCLS323M − MARCH 1996 − REVISED JUNE 2005 D D D D D D Latch-Up Performance Exceeds 250 mA Per Operating Range of 2 V to 5.5 V Max tpd of 8 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V
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SN74AHC1G86
SCLS323M
000-V
A114-A)
A115-A)
SN74AHC1G86DBVR
A115-A
C101
SN74AHC1G86
marking A86
SN74AHC1G86-EP
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A115-A
Abstract: C101 SN74LVC1G86
Text: SN74LVC1G86 SINGLE 2-INPUT EXCLUSIVE-OR GATE www.ti.com SCES222N – APRIL 1999 – REVISED FEBRUARY 2007 FEATURES • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC1G86
SCES222N
24-mA
000-V
A114-A)
A115-A)
A115-A
C101
SN74LVC1G86
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Untitled
Abstract: No abstract text available
Text: SN74LVC2G14 DUAL SCHMITT-TRIGGER INVERTER www.ti.com SCES200L – APRIL 1999 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC2G14
SCES200L
24-mA
000-V
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DB354
Abstract: QFN40 DB601 SDIP32 SO24 ST7260 ST7263B TQFP48 UM0102 DB709
Text: UM0102 User Manual ST7MDTU3-EMU3 probe Introduction The ST7-EMU3 series emulators are the third generation of high-end emulators for ST7. They are designed to provide a complete range of advanced debugging features. In addition, they contain all the adapters, connectors and sockets you need to emulate any
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UM0102
DB354
QFN40
DB601
SDIP32
SO24
ST7260
ST7263B
TQFP48
UM0102
DB709
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Untitled
Abstract: No abstract text available
Text: STG4160 Low voltage 0.5 Ω single SPDT switch with break-before-make feature and 15 kV contact ESD protection Features • Wide operating voltage range: VCC opr = 1.65 to 4.8 V ■ Low power dissipation: ICC = 0.2 µA (max.) at TA = 85 °C ■ Low "ON" resistance:
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STG4160
100mA
IEC-61000-4-2
JESD22
A114-B
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C101
Abstract: LMV321 LMV324 LMV324S LMV358
Text: www.ti.com LMV321 SINGLE, LMV358 DUAL LMV324 QUAD, LMV324S QUAD WITH SHUTDOWN LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS FEATURES SLOS263T – AUGUST 1999 – REVISED SEPTEMBER 2007 1 • • • • • • • 2.7-V and 5-V Performance –40°C to 125°C Operation
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LMV321
LMV358
LMV324
LMV324S
SLOS263T
LMV324S)
LMV321
LMV358
LMV324
LMV324S
C101
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Untitled
Abstract: No abstract text available
Text: ST7SCR1E4, ST7SCR1R4 8-bit low-power, full-speed USB MCU with 16-Kbyte Flash, 768-byte RAM, smartcard interface and timer Datasheet − production data Features Memories • Up to 16 Kbytes of ROM or High Density Flash HDFlash program memory with read/write
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16-Kbyte
768-byte
LQFP64
14x14
QFN24
ISO7816-3
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lnb schematic
Abstract: ferrite C5A 470nF 1N4007 1N5818 BAT43 LNBH24 QFN32 STPS130A schematic diagram satellite converter
Text: STEVAL-CBL006V1 Demonstation board: power supply for LNB based on the LNBH24 QFN32 Data Brief Features • Complete interface between LNBs and I²C bus ■ Built-in DC-DC converter for single 12 V supply (8 V to 15 V Vin range) operation and high efficiency (typ. 93%@0.5 A)
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STEVAL-CBL006V1
LNBH24
QFN32)
lnb schematic
ferrite C5A
470nF
1N4007
1N5818
BAT43
LNBH24
QFN32
STPS130A
schematic diagram satellite converter
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TPS3103
Abstract: TPS3103E12DBVR TPS3103E15DBVR TPS3103H20DBVR TPS3103K33DBVR TPS3106 TPS3106E09DBVR TPS3110
Text: TPS3103xxx TPS3106xxx TPS3110xxx www.ti.com SLVS363E – AUGUST 2001 – REVISED SEPTEMBER 2007 UltraLow Supply-Current/Supply-Voltage Supervisory Circuits FEATURES 1 • Precision Supply Voltage Supervision Range: 0.9 V, 1.2 V, 1.5 V, 1.6 V, 2 V, and 3.3 V
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TPS3103xxx
TPS3106xxx
TPS3110xxx
SLVS363E
OT23-6
TPS310x
TPS311x
TPS3103
TPS3103E12DBVR
TPS3103E15DBVR
TPS3103H20DBVR
TPS3103K33DBVR
TPS3106
TPS3106E09DBVR
TPS3110
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SAAI Marking
Abstract: No abstract text available
Text: SN65LVDS1 SN65LVDS2 SN65LVDT2 www.ti.com. SLLS373K – JULY 1999 – REVISED NOVEMBER 2008 HIGH-SPEED DIFFERENTIAL LINE DRIVER/RECEIVERS
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SN65LVDS1
SN65LVDS2
SN65LVDT2
SLLS373K
TIA/EIA-644A
SN65LVDT2
SAAI Marking
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SN74AUC1G17DBVR
Abstract: No abstract text available
Text: SN74AUC1G17 SINGLE SCHMITT-TRIGGER BUFFER www.ti.com SCES376N – SEPTEMBER 2001 – REVISED APRIL 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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SN74AUC1G17
SCES376N
000-V
A114-A)
A115-A)
SN74AUC1G17DBVR
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Untitled
Abstract: No abstract text available
Text: SN74AHCT1G86 SINGLE 2-INPUT EXCLUSIVE-OR GATE SCLS324L – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 8 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V
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SN74AHCT1G86
SCLS324L
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: TLV320AIC3107 www.ti.com. SLOS545B – NOVEMBER 2008 – REVISED JANUARY 2009 LOW-POWER STEREO CODEC WITH INTEGRATED MONO CLASS-D SPEAKER AMPLIFIER
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TLV320AIC3107
SLOS545B
16/20/24/32-Bit
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Untitled
Abstract: No abstract text available
Text: SN74LVC1G240 SINGLE BUFFER/DRIVER WITH 3-STATE OUTPUT www.ti.com SCES305J – JANUARY 2001 – REVISED JANUARY 2007 FEATURES • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V
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SN74LVC1G240
SCES305J
24-mA
000-V
A114-A)
A115-A)
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UDT PIN-040A
Abstract: No abstract text available
Text: OPA2111 Dual Low Noise Precision Difet ® OPERATIONAL AMPLIFIER FEATURES APPLICATIONS ● LOW NOISE: 100% Tested, 8nV/√Hz max at 10kHz ● PRECISION INSTRUMENTATION ● DATA ACQUISITION ● TEST EQUIPMENT ● ● ● ● ● LOW BIAS CURRENT: 4pA max
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OPA2111
10kHz
114dB
OPA2111
UDT PIN-040A
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114-18743-1
Abstract: 108-94020 "ISO 8015" aeg tu
Text: R E V I S I O N S AENDERUNGEN LTR DESCRIPTION DATE DWN APVD B F S E H R F I RUN H wi e P R O J E K T NR. : SECONDARY IN SEE PEN E-08-022015 19FEB2009 GB JG G1 P E T A ILS SEE PEN E-11-001007 14FEB2011 PB JG H P E T A ILS SEE PEN E-11-002703 31MAR201 1 PB JG
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E-08-022015
E-11-001007
E-11-002703
E-009362
19FEB2009
14FEB2011
31MAR201
EGATNQ634Q
GR00P
114-18743-1
108-94020
"ISO 8015"
aeg tu
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19FEB2009
Abstract: No abstract text available
Text: THIS DRAWING IS UNPUBLISHED. COPYRIGHT RELEASED FOR PUBLICATION ALL RIGHTS RESERVED. BY - REVISIONS LOC DW 7 .0 0 DIM D DESCRIPTION LTR A3 o PI- + 0.05 2.65o REVISED PER ECO- m WITHOUT SOLDER AREA RECOMMENDED PCB LAYOUT TOLERANCE: ± 0 .0 5 REEL 4 .4 5
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07MAR11
UL94-V0,
100ju"
19FEB2009
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114-18807
Abstract: 108-94020 1703639 2-1564414-1 1355055
Text: C O P Y R I G H T 20 08 Tyco E l e c t r o n i c s A MP GmbH R E L E A S E D FOR P U B L IC A T IO N FREI FUER V E R O E F F E N T L I C H U N G ALL RIGHTS RESERVED. ALLE R EE HT E VORBEHALTEN. MAR M A T E D W I TH: F A S S E N D Z U: LOC sEE DIST R E V I S I O N S
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EGATNO0277
PCN-08-029526
PCN-11-009362
19FEB2009
25MAY2011
114-18807
108-94020
1703639
2-1564414-1
1355055
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114-18743-1
Abstract: tyco mcp 5 tyco mcp AMP MCP A/Detector/"Detector IC"/"CD"/114-18743-1
Text: R E L E A S E D F O R P U B L I C A T I ON FREI FUER V E R O E F F E N T L I C H U N G COPYR IGHT2006 BY TYCO ELECTRONICS CORPORATION A LL AI I F R IGHTS RFFHTF APR 2006 ^l ATED W I TH: E S S E N D Z U: REV I S IONS AENDERUNQEN R E S E R V E D . SEE VflRRFHAI T FN .
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IGHT2006
EGATN05327
P-09-001883
E-09-027769
E-10-007388
19FEB2009
15FEB2010
06APR2010
3IMAR2000
114-18743-1
tyco mcp 5
tyco mcp
AMP MCP
A/Detector/"Detector IC"/"CD"/114-18743-1
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