n74f02
Abstract: 74F02 I74F02D I74F02N N74F02D N74F02N
Text: Philips Semiconductors Product specification Quad 2-input NOR gate 74F02 FEATURE PIN CONFIGURATION • Industrial temperature range available –40°C to +85°C TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F02 3.4ns 4.4mA Q0 1 14 VCC D0a
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74F02
SF00007
14-pin
N74F02N
I74F02N
OT27-1
N74F02D
I74F02D
n74f02
74F02
I74F02D
I74F02N
N74F02D
N74F02N
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PDF
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118Q2
Abstract: No abstract text available
Text: Philips Semiconductors Product specification Triple 3-input NOR gate 74F27 FEATURE PIN CONFIGURATION • Industrial temperature range available –40°C to +85°C TYPE D0a 1 14 VCC D0b 2 13 D0c TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) D1a
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74F27
SF00033
14-pin
N74F27N
N74F27D
I74F27N
I74F27D
500ns
118Q2
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PDF
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philips ic06 cmos
Abstract: logic package information philips ic06 logic family specification philips ic06 74HC-HCT-HCMOS Logic Package Outlines 74HC series PHILIPS 74HC Logic Family Specifications
Text: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT4002
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Original
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74HC/HCT/HCU/HCMOS
74HC/HCT4002
74HC/HCT4002
4000B"
01-Nov-97)
philips ic06 cmos
logic package information philips ic06
logic family specification philips ic06
74HC-HCT-HCMOS Logic Package Outlines
74HC series PHILIPS
74HC Logic Family Specifications
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PDF
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74LVT
Abstract: 74LVT02 74LVT02PW
Text: INTEGRATED CIRCUITS 74LVT02 3.3V Quad 2-input NOR gate Product specification IC24 Data Handbook Philips Semiconductors 1996 Aug 15 Product specification Philips Semiconductors 3.3V Quad 2-input NOR gate 74LVT02 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C;
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74LVT02
14-Pin
74LVT02
OT108-1Semiconductors
74LVT
74LVT02PW
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PDF
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74F02
Abstract: I74F02D I74F02N N74F02D N74F02N
Text: INTEGRATED CIRCUITS 74F02 Quad 2-input NOR gate Product specification IC15 Data Handbook Philips Semiconductors 1990 Oct 04 Philips Semiconductors Product specification Quad 2-input NOR gate 74F02 FEATURE PIN CONFIGURATION • Industrial temperature range available –40°C to +85°C
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Original
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74F02
SF00007
DIP14:
OT27-1
OT108-1
74F02
I74F02D
I74F02N
N74F02D
N74F02N
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PDF
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74ABT02
Abstract: 74ABT 74ABT02PW
Text: INTEGRATED CIRCUITS 74ABT02 Quad 2-input NOR gate Product specification IC24 Data Handbook Philips Semiconductors 1995 Sep 18 Philips Semiconductors Product specification Quad 2-input NOR gate 74ABT02 QUICK REFERENCE DATA SYMBOL tPLH tPHL LOGIC DIAGRAM CONDITIONS
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Original
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74ABT02
74ABT02
74ABT
74ABT02PW
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PDF
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SOT27-1 DIP14
Abstract: 74F02 I74F02D I74F02N N74F02D N74F02N
Text: INTEGRATED CIRCUITS 74F02 Quad 2-input NOR gate Product specification IC15 Data Handbook Philips Semiconductors 1990 Oct 04 Philips Semiconductors Product specification Quad 2-input NOR gate 74F02 FEATURE PIN CONFIGURATION • Industrial temperature range available –40°C to +85°C
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Original
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74F02
SF00007
SOT27-1 DIP14
74F02
I74F02D
I74F02N
N74F02D
N74F02N
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PDF
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74LVC02A
Abstract: 74LVC02APW
Text: INTEGRATED CIRCUITS 74LVC02A Quad 2-input NOR gate Product specification Supersedes data of 1997 Aug 11 IC24 Data Handbook Philips Semiconductors 1998 Apr 28 Philips Semiconductors Product specification Quad 2-input NOR gate 74LVC02A FEATURES DESCRIPTION • Wide supply range of 1.2V to 3.6V
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Original
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74LVC02A
74LVC02A
OT108-1
SSOP14:
OT337-1
TSSOP14:
74LVC02APW
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PDF
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HEF4001UBP
Abstract: BAW62 HE4000B HEF4001UB HEF4001UBD HEF4001UBT MS-012AB HEF4001* OR
Text: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4001UB gates Quadruple 2-input NOR gate
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Original
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HE4000B
HEF4001UB
HEF4001UB
OT27-1
050G04
MO-001AA
HEF4001UBP
BAW62
HEF4001UBD
HEF4001UBT
MS-012AB
HEF4001* OR
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PDF
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74LVC02A
Abstract: 74LVC02APW
Text: INTEGRATED CIRCUITS 74LVC02A Quad 2-input NOR gate Product specification Supersedes data of 1997 Aug 11 IC24 Data Handbook Philips Semiconductors 1998 Apr 28 Philips Semiconductors Product specification Quad 2-input NOR gate 74LVC02A FEATURES DESCRIPTION • Wide supply range of 1.2V to 3.6V
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Original
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74LVC02A
74LVC02A
74LVC02APW
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PDF
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Untitled
Abstract: No abstract text available
Text: LS02 Quad 2-Input Positive NOR Gate The LS02 is a bipolar, NPN, sealed-junction, silicon integrated circuit. It is manufactured in low-power Schottky technology and is available in a wirebonded, 14-pin plastic DIP or surface mount package. Electrical Characteristics
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OCR Scan
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14-pin
WP90222L2)
WP91397L2)
WP90222L2:
WP91397L2:
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PDF
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9b36
Abstract: No abstract text available
Text: SH H A R R HCTS02MS IS SEMICONDUCTOR Radiation Hardened Quad 2-Input NOR Gate December 1992 Pinouts Features • 14 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR CDIP2-T14, LEAD FINISH C TOP VIEW 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K or 1 Mega-RAD SI
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OCR Scan
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HCTS02MS
MIL-STD-1835
CDIP2-T14,
HCTS02MS
05A/cm2
100nm
9b36
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PDF
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IR 0251
Abstract: SP381A
Text: NOR GATE SP381A Quad 2-Input with Open Collector PIN CONFIGURATION * 14 * 13 12 11 10 9 8 SP381A * O p e n C o lle c t o r O u t p u t s ELECTRICAL CHARACTERISTICS Notes 1. 2, 3,5 and 7 Standard Conditions: V c c = 5.0V , T A = Operating Temp. Range (Unless Noted)
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OCR Scan
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SP381A
SP381A
500ns
IR 0251
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PDF
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LS02
Abstract: WP90222L2
Text: LS02 Quad 2-Input Positive NOR Gate T he LS02 is a bipolar, NPN, sealed-junction, silicon integrated circuit. It is m anufactured in low-power S ch o ttky te c h n o lo g y and is available in a wirebonded, 14-pin plastic DIP or surface m ount package. Electrical Characteristics
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OCR Scan
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14-pin
WP90222L2)
WP91397L2)
WP90222L2:
WP91397L2:
LS02
WP90222L2
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PDF
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Untitled
Abstract: No abstract text available
Text: I A T & T MELEC I C 02 D • 00SGD2b DOOOlSflJS I T-43-15 WA-LS02, WP90222 List 2 Quad 2-Input Positive NOR Gate The LS02 is a bipolar, NPN, sealed-junction, silicon integrated circuit. It is manufactured in low-power Schottky technology and is available in a wirebonded, 14-pin plastic DIP or surface mount package.
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OCR Scan
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00SGD2b
T-43-15
WA-LS02,
WP90222
14-pin
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PDF
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Untitled
Abstract: No abstract text available
Text: HCS02MS EB Radiation Hardened Quad 2-Input NOR Gate December 1992 Features Pinouts • 3 Micron Radiation Hardened SOS CMOS 14 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR CDIP2-T14, LEAD FINISH C TOP VIEW • Total Dose 200K or 1 Mega-RAD Si • Dose Rate Upset >101° RAD(Siys 20ns Pulse
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OCR Scan
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HCS02MS
MIL-STD-1835
CDIP2-T14,
HCS02MS
05A/cm2
100nm
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PDF
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Untitled
Abstract: No abstract text available
Text: A T & T MELEC I C 02 D • 005005b 0000174 L ■ T-43-15 WA-LS27, WP90224 List 2 TViple 3-Input Positive NOR Gate The LS27 is a bipolar, NPN, sealed-junction, silicon integrated circuit. It is manufactured in low-power Schottky technology and is available in a wirebonded, 14-pin plastic DIP or surface mount package.
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OCR Scan
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005005b
T-43-15
WA-LS27,
WP90224
14-pin
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PDF
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Untitled
Abstract: No abstract text available
Text: NOR GATE SP381A Quad 2-Input with Open Collector PIN CONFIGURATION 14 13 12 11 10 9 8 SP381A *O p e n C o lle c to r O u tp u ts ELECTRICAL CHARACTERISTICS Notes 1. 2,3,5 and 7 Standard Conditions: V q q = 5.0V , = Operating Temp. Range (Unless Noted) C H A R A C T E R IS T IC
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OCR Scan
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SP381A
SP381A
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PDF
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GDGD174
Abstract: LS27 WA-LS27 WP90224
Text: A T & T MELEC I C 02 J> 005005b 0000174 b • T-43-15 WA-LS27, WP90224 List 2 TViple 3-Input Positive NOR Gate Vcc The LS27 is a bipolar, NPN, sealed-junction, silicon integrated circuit. It is manufactured in low-power Schottky technology and is available in a wirebonded, 14-pin plastic DIP or surface mount package.
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OCR Scan
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WA-LS27,
WP90224
GDGD174
T-43-15
14-pin
0050G2b
LS27
WA-LS27
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PDF
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Untitled
Abstract: No abstract text available
Text: HARRI S S E M I C O N D S E CT OR 5ÛE D • 43G 227 1 00430^17 Sib « H A S HCS02MS HARRIS SEMICONDUCTOR T = 4 Z r 'X [ Radiation Hardened Quad 2-Input NOR Gate December 1992 Pinouts Features • 3 Micron Radiation Hardened SOS CMOS 14 PIN CERAMIC DUAL-IN-LINE
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OCR Scan
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HCS02MS
MIL-STO-1B35
CDIP2-T14,
05A/cm2
100nm
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PDF
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TA 7634
Abstract: No abstract text available
Text: HCTS7266MS fü HARRIS S E M I C O N D U C T O R Radiation Hardened Quad 2-Input Exclusive NOR Gate December 1992 Features Pinouts • 3 Micron Radiation Hardened CMOS SOS 14 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835 CDIP2-T14, LEAD FINISH C TOP VIEW • Total Dose 200K or 1 Mega-RAD Si
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OCR Scan
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HCTS7266MS
MIL-STD-1835
CDIP2-T14,
HCTS7266MS
TA 7634
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PDF
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Untitled
Abstract: No abstract text available
Text: 5ÖE T> WM 4302571 0044000 bbT « H A S HARRIS SEMICON] SECTOR i l l HCTS27MS H A R R I S S E M I C O N D U C T O R Radiation Hardened Triple 3-Input NOR Gate December 1992 Features - P Pinouts • 3 Micron Radiation Hardened SOS CMOS 4 S - 2 l ” 14 PIN CERAMIC DUAL-IN-LINE
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OCR Scan
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HCTS27MS
STD-1835
CDIP2-T14,
4302E71
0D44DDS
10sA/cm2
100pm
100nm
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PDF
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Untitled
Abstract: No abstract text available
Text: SfiE » HARRI S SE MI C O N D SE CT OR 430 227 1 0 0 4 3 ^ 0 3 blT IHAS HCTS02MS CX H A R R IS S E M I C O N D U C T O R -7 = -4 3 -2 J Radiation Hardened Quad 2-Input NOR! Gate December 1992 Pinouts Features 14 PIN CERAMIC DUAL-IN-UNE MIL-STD-1835 DESIGNATOR CDIP2-T14, LEAD FINISH C
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OCR Scan
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HCTS02MS
MIL-STD-1835
CDIP2-T14,
87x88
10sA/cm2
100nm
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PDF
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MC14002B
Abstract: ic mc14001 IC MC14011 MC14068B MC14001B MC14011B MC14075B MC14001 MC14078B CD4000 NOR gate
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C14001B Quad 2 -In p u t NOR G ate B-Suffix S e rie s CM OS G a te s M C14002B T he B S e rie s lo g ic g a te s are c o n s tru c te d w ith P and N c h a n n e l enhancem ent mode devices in a single monolithic structure Complemen
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OCR Scan
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MC14011B
MC14081B
CD4000
MC14068B
MC14078B)
mc14001b/d
MC14001B/D
MC14002B
ic mc14001
IC MC14011
MC14001B
MC14075B
MC14001
MC14078B
CD4000 NOR gate
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PDF
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