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    25 Q 80 Search Results

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    25 Q 80 Price and Stock

    Winbond Electronics Corp W25Q80DVSNIG-TR

    IC FLASH 8MBIT SPI/QUAD 8SOIC
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    DigiKey W25Q80DVSNIG-TR Digi-Reel 167,583 1
    • 1 $0.62
    • 10 $0.547
    • 100 $0.4851
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    W25Q80DVSNIG-TR Cut Tape 167,583 1
    • 1 $0.62
    • 10 $0.547
    • 100 $0.4851
    • 1000 $0.43048
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    W25Q80DVSNIG-TR Reel 166,000 2,500
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    BYTe Semiconductor BY25Q80ESTIG(T)

    IC FLASH 8MBIT SPI/QUAD 8SOP
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    DigiKey BY25Q80ESTIG(T) Tube 29,994 1
    • 1 $0.68
    • 10 $0.42
    • 100 $0.2698
    • 1000 $0.18622
    • 10000 $0.15143
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    BYTe Semiconductor BY25Q80ESSIG(T)

    IC FLASH 8MBIT SPI/QUAD 8SOP
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    DigiKey BY25Q80ESSIG(T) Tube 18,905 1
    • 1 $0.71
    • 10 $0.439
    • 100 $0.71
    • 1000 $0.2124
    • 10000 $0.15937
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    Winbond Electronics Corp W25Q80DVZPIG

    IC FLASH 8MBIT SPI/QUAD 8WSON
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    DigiKey W25Q80DVZPIG Tube 11,733 1
    • 1 $0.62
    • 10 $0.547
    • 100 $0.4857
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    • 10000 $0.39674
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    Bristol Electronics W25Q80DVZPIG 4
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    ComSIT USA W25Q80DVZPIG 101
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    NAC W25Q80DVZPIG 100,570
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    Chip One Stop W25Q80DVZPIG Tube 63
    • 1 -
    • 10 $0.406
    • 100 $0.402
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    BYTe Semiconductor BY25Q80BSTIG(T)

    IC FLASH 8MBIT SPI/QUAD 8SOP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey BY25Q80BSTIG(T) Tube 10,000 1
    • 1 $0.72
    • 10 $0.446
    • 100 $0.2878
    • 1000 $0.1994
    • 10000 $0.16266
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    Find more 25 Q 80 price and stock on Findchips.com

    25 Q 80 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    LTC5584

    Abstract: LTC5585 LT5516 DN1027 LT5575
    Text: Ultra-Wideband, High Linearity I/Q Demodulators 120 DC Offset IIP2 Optimization Cancellation I 700MHz to 3GHz 100 IIP2 dBm LTC5585 0° 25.7dBm IIP3 at 1.9GHz I, –40°C I, 25°C I, 85°C I, 105°C 110 Q, –40°C Q, 25°C Q, 85°C Q, 105°C fRF = 1950MHz


    Original     		LTC5585 700MHz 1950MHz 450MHz LTC5584 30MHz 31dBm 80dBm 200mA LTC5584 LTC5585 LT5516 DN1027 LT5575 PDF

    GAL programmer schematic

    Abstract: gal programmer gal programming algorithm 16v8h 16V8Z-25 16v8h-10 palce16v8 programming algorithm 16V8H-5 GAL 16 v 8 D pal16r8 programming algorithm
    Text: PALCE16V8 PALCE16V8Z COM’L:H-5/7/10/15/25, Q-10/15/25 IND:H-10/15/25, Q-20/25 COM’L:-25 IND:-12/15/25 PALCE16V8 and PALCE16V8Z Families EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS ◆ Pin and function compatible with all 20-pin PAL devices


    Original     		PALCE16V8 PALCE16V8Z H-5/7/10/15/25, Q-10/15/25 H-10/15/25, Q-20/25 PALCE16V8 PALCE16V8Z 20-Pin GAL programmer schematic gal programmer gal programming algorithm 16v8h 16V8Z-25 16v8h-10 palce16v8 programming algorithm 16V8H-5 GAL 16 v 8 D pal16r8 programming algorithm PDF

    palce16v8 programming algorithm

    Abstract: 16v8z PAL 16V8Q 16V8H-15 16V8Z-25 automatic change over switch circuit diagram pal16r8 programming algorithm GAL programmer schematic 16V8H-5 16V8H-10
    Text: PALCE16V8 PALCE16V8Z COM’L:H-5/7/10/15/25, Q-10/15/25 IND:H-10/25, Q-20/25 COM’L:-25 IND:-12/15/25 PALCE16V8 and PALCE16V8Z Families EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS ◆ Pin and function compatible with all 20-pin PAL devices


    Original     		PALCE16V8 PALCE16V8Z H-5/7/10/15/25, Q-10/15/25 H-10/25, Q-20/25 PALCE16V8 PALCE16V8Z 20-Pin palce16v8 programming algorithm 16v8z PAL 16V8Q 16V8H-15 16V8Z-25 automatic change over switch circuit diagram pal16r8 programming algorithm GAL programmer schematic 16V8H-5 16V8H-10 PDF

    palce16v8 programming algorithm

    Abstract: 16V8Q PAL16L8 programming algorithm 16V8H-15 PAL 16V8Q 16V8H-10 16V8H-5 16v8h 16v8h-7 16V8Z-25
    Text: PALCE16V8 PALCE16V8Z COM’L:H-5/7/10/15/25, Q-10/15/25 IND:H-10/25, Q-20/25 COM’L:-25 IND:-12/15/25 PALCE16V8 and PALCE16V8Z Families EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS ◆ Pin and function compatible with all 20-pin PAL devices


    Original     		PALCE16V8 PALCE16V8Z H-5/7/10/15/25, Q-10/15/25 H-10/25, Q-20/25 PALCE16V8 PALCE16V8Z 20-Pin palce16v8 programming algorithm 16V8Q PAL16L8 programming algorithm 16V8H-15 PAL 16V8Q 16V8H-10 16V8H-5 16v8h 16v8h-7 16V8Z-25 PDF

    PH1090-700B

    Abstract: Mode-S transistor
    Text: Avionics Pulsed Power Transistor, 700 Watts, 12/10/01 1.03-1.09 GHz, 32 µS Pulse, 2% Duty PH1090-700B Rev. 0 Features Q Q Q Q Q Q Q Q Absolute Maximum Ratings @ 25 °C Designed for Mode-S IFF Applications NPN Silicon Microwave Power Transistor Common Base Configuration


    Original     		PH1090-700B PH1090-700B Mode-S transistor PDF

    16v8h

    Abstract: 16V8Q palce16v8 programming algorithm 16v8z PAL16C1 PAL16R8 PALCE16V8 PALCE16V8Z 16V8H-10 16v8z-25
    Text: PALCE16V8 PALCE16V8Z COM’L:H-5/7/10/15/25, Q-10/15/25 IND:H-10/25, Q-20/25 COM’L:-25 IND:-12/15/25 PALCE16V8 and PALCE16V8Z Families EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS ◆ Pin and function compatible with all 20-pin PAL devices


    Original     		PALCE16V8 PALCE16V8Z H-5/7/10/15/25, Q-10/15/25 H-10/25, Q-20/25 PALCE16V8 PALCE16V8Z 20-Pin 16v8h 16V8Q palce16v8 programming algorithm 16v8z PAL16C1 PAL16R8 16V8H-10 16v8z-25 PDF

    16V8H-15

    Abstract: palce16v8 programming algorithm 16V8Q 16V8H-10 AMD palce16v8 programming 16v8h-7 PAL10H8 PAL16C1 PAL16R8 PALCE16V8
    Text: FINAL COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-10/15/25, Q-20/25 PALCE16V8 Family EE CMOS 20-Pin Universal Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Pin and function compatible with all 20-pin GAL devices ■ Programmable output polarity


    Original     		H-5/7/10/15/25, Q-10/15/25 H-10/15/25, Q-20/25 PALCE16V8 20-Pin 20-pin PAL16R8 PAL10H8 16V8H-15 palce16v8 programming algorithm 16V8Q 16V8H-10 AMD palce16v8 programming 16v8h-7 PAL16C1 PAL16R8 PDF

    20v8h

    Abstract: 20V8Q
    Text: COM'L: H-5/7/10/15/25, Q-15/25 IND: H-15/25, Q-20/25 PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS ◆ Pin and function compatible with all PAL 20V8 devices ◆ Electrically erasable CMOS technology provides reconfigurable logic and full testability


    Original     		H-5/7/10/15/25, Q-15/25 H-15/25, Q-20/25 PALCE20V8 24-Pin GAL20V8 PAL20R8 20v8h 20V8Q PDF

    palce16v8 programming algorithm

    Abstract: palce22v10 programming guide automatic change over switch circuit diagram PAL16L8 programming algorithm palce programming algorithm palce programming Guide GAL programming Guide PALCE erase 16V8H-10 HC CMOS family characteristics
    Text: FINAL COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-10/15/25, Q-20/25 PALCE16V8 Family EE CMOS 20-Pin Universal Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Pin and function compatible with all 20-pin GAL devices ■ Programmable output polarity


    Original     		H-5/7/10/15/25, Q-10/15/25 H-10/15/25, Q-20/25 PALCE16V8 20-Pin 20-pin PAL16R8 PAL10H8 palce16v8 programming algorithm palce22v10 programming guide automatic change over switch circuit diagram PAL16L8 programming algorithm palce programming algorithm palce programming Guide GAL programming Guide PALCE erase 16V8H-10 HC CMOS family characteristics PDF

    GAL20V8

    Abstract: PAL20R8 PALCE20V8
    Text: FINAL COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-15/25, Q-20/25 PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Pin and function compatible with all GAL ■ ■ ■ ■ ■ ■ Peripheral Component Interconnect PCI


    Original     		H-5/7/10/15/25, Q-10/15/25 H-15/25, Q-20/25 PALCE20V8 24-Pin 20V8/As GAL20V8 PAL20R8 PDF

    IRF-36

    Abstract: No abstract text available
    Text: IRF-36 Vishay Dale Inductors Epoxy Conformal Coated, Axial Leaded FEATURES STANDARD ELECTRICAL SPECIFICATIONS TEST FREQ. IND. Q L&Q µH TOL. MIN. (MHz) 0.10 ± 5 %, ± 10 % 25 25.2 0.12 ± 5 %, ± 10 % 25 25.2 0.15 ± 5 %, ± 10 % 25 25.2 0.18 ± 5 %, ± 10 % 25


    Original     		IRF-36 08-Apr-05 IRF-36 PDF

    20v8q

    Abstract: 20V8H-15 20V8 GAL20V8 PAL20R8 PALCE20V8 PAL20V8 PD3024 PALCE20V8H5JC5
    Text: COM'L: H-5/7/10/15/25, Q-10/15/25 IND: H-15/25, Q-20/25 PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS ◆ Pin and function compatible with all PAL 20V8 devices ◆ Electrically erasable CMOS technology provides reconfigurable logic and full testability


    Original     		H-5/7/10/15/25, Q-10/15/25 H-15/25, Q-20/25 PALCE20V8 24-Pin PD3024) 28-Pin 20v8q 20V8H-15 20V8 GAL20V8 PAL20R8 PAL20V8 PD3024 PALCE20V8H5JC5 PDF

    PAL20L2 programming specification

    Abstract: 20v8q SL0311 20V8H-5 PALCE20V8
    Text: COM'L: H-5/7/10/15/25, Q-10/15/25 IND: H-15/25, Q-20/25 PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS ◆ Pin and function compatible with all PAL 20V8 devices ◆ Electrically erasable CMOS technology provides reconfigurable logic and full testability


    Original     		H-5/7/10/15/25, Q-10/15/25 H-15/25, Q-20/25 PALCE20V8 24-Pin PD3024) 28-Pin PAL20L2 programming specification 20v8q SL0311 20V8H-5 PDF

    20V8H-15

    Abstract: Pal programming 20V8H-5 20v8h 20V8H-10 20V8 PAL20R8 PALCE20V8 GAL20V8 PAL20V8
    Text: COM'L: H-5/7/10/15/25, Q-10/15/25 IND: H-15/25, Q-20/25 PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS ◆ Pin and function compatible with all PAL 20V8 devices ◆ Electrically erasable CMOS technology provides reconfigurable logic and full testability


    Original     		H-5/7/10/15/25, Q-10/15/25 H-15/25, Q-20/25 PALCE20V8 24-Pin regis15 PALCE20V8H-5 PALCE20V8H-7 20V8H-15 Pal programming 20V8H-5 20v8h 20V8H-10 20V8 PAL20R8 GAL20V8 PAL20V8 PDF

    palce16v8 programming algorithm

    Abstract: 16V8Q 16V8H-15 Jc 16V8H-15 16v8h PAL16L8 programming algorithm AMD palce16v8 programming gal programming algorithm gal programming timing chart SL1110
    Text: FINAL COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-10/15/25, Q-20/25 PALCE16V8 Family EE CMOS 20-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Pin and function compatible with all 20-pin GAL devices ■ Programmable output polarity ■ Electrically erasable CMOS technology


    Original     		H-5/7/10/15/25, Q-10/15/25 H-10/15/25, Q-20/25 PALCE16V8 20-Pin 20-pin PAL16R8 PAL10H8 palce16v8 programming algorithm 16V8Q 16V8H-15 Jc 16V8H-15 16v8h PAL16L8 programming algorithm AMD palce16v8 programming gal programming algorithm gal programming timing chart SL1110 PDF

    15015 3524

    Abstract: D-35 RS-100 RS-150 RS-35 RS-50 RS-75 1.0A
    Text: G3 Series 25~150W High Reliability Miniature 1~4 Output Features RS-150 RD/ID/T/Q-125 RS-100 RD/ID/T/Q-85 RS-75 RD/ID/T/Q-65 RS-50 RD/ID/T/Q-50 R S -35 R D-35 R S -25 General Specification Please refer to www.meanwell.com for detail spec. MODEL No. RS-35


    Original     		RS-150 RD/ID/T/Q-125 RS-100 RD/ID/T/Q-85 RS-75 RD/ID/T/Q-65 RS-50 RD/ID/T/Q-50 RS-35 15015 3524 D-35 RS-100 RS-150 RS-35 RS-50 RS-75 1.0A PDF

    20V8Q

    Abstract: SL06 20V8H-15 20V8 GAL20V8 PAL20R8 PALCE20V8 PD3024 pal20v8
    Text: COM'L: H-5/7/10/15/25, Q-10/15/25 IND: H-15/25, Q-20/25 PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS ◆ Pin and function compatible with all PAL 20V8 devices ◆ Electrically erasable CMOS technology provides reconfigurable logic and full testability


    Original     		H-5/7/10/15/25, Q-10/15/25 H-15/25, Q-20/25 PALCE20V8 24-Pin PD3024) 28-Pin 20V8Q SL06 20V8H-15 20V8 GAL20V8 PAL20R8 PD3024 pal20v8 PDF

    Untitled

    Abstract: No abstract text available
    Text: □ IXYS VDSS HiPerFET Power MOSFETs 27N80 IXFK 25N80 IXFN 27N80 IXFN 25N80 ix f k N-Channel Enhancement Mode AvalancheRated, High dv/dt, Lowtrr 800 800 800 800 V V V V D ^D25 27 25 27 25 A A A A D S o n 0.30 0.35 0.30 0.35 Q Q Q Q TO -264A A (IX FK )


    OCR Scan     		27N80 25N80 -264A PDF

    iP2970

    Abstract: palce16v8 programming guide
    Text: COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-10/15/25, Q-20/25 MIL: H-15/20/25 PALCE16V8 Family AdvaM "£o EE CMOS 20-Pin Universal Programmable Array Logic Devices DISTINCTIVE CHARACTERISTICS • ■ ■ Pin, function and fuse-map compatible with all 20-pin GAL devices


    OCR Scan     		H-5/7/10/15/25, Q-10/15/25 H-10/15/25, Q-20/25 H-15/20/25 PALCE16V8 20-Pin PAL16R8 PAL10H8 iP2970 palce16v8 programming guide PDF

    palce16v8 programming algorithm

    Abstract: AMD palce16v8 programming palce16v8 programming guide palce16v8z pal16r8 programming algorithm APL DOC SIC jmd PROGRAMMER PAL16R8 algorithm amd palce programming Guide palce16v6
    Text: COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-10/15/25, Q-20/25 a MIL: H-15/20/25 Advanced Micro Devices PALCE16V8 Family EE CMOS 20-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Pin, function and fuse-map compatible with all 20-pin GAL devices


    OCR Scan     		H-5/7/10/15/25, Q-10/15/25 H-10/15/25, Q-20/25 H-15/20/25 PALCE16V8 20-Pin PAL16R8 PAL10H8 palce16v8 programming algorithm AMD palce16v8 programming palce16v8 programming guide palce16v8z pal16r8 programming algorithm APL DOC SIC jmd PROGRAMMER PAL16R8 algorithm amd palce programming Guide palce16v6 PDF

    TP25N05

    Abstract: TP25N
    Text: £jï 25 05 25 05 SGS-THOMSON ULKgraMOeS STP N STP N FI N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR TYP E V S TP25N 05 STP25N 05FI . . . . . . . . dss 50 V 50 V RDS on Id < 0 .0 6 5 Q. < 0 .0 6 5 Q. 25 A 16 A TYPICAL R DS(on) = 0.048 Q. AVALANCHE RUGGED TECHNOLOGY


    OCR Scan     		TP25N STP25N TP25N05 PDF

    plji

    Abstract: No abstract text available
    Text: COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-15/25. Q-20/25 MIL: H-15/20/25 PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Pin, function and fuse-map compatible with all GAL 20V8/AS ■ Electrically erasable CMOS technology pro­


    OCR Scan     		H-5/7/10/15/25, Q-10/15/25 H-15/25. Q-20/25 H-15/20/25 PALCE20V8 24-Pin 20V8/AS 24-pin plji PDF

    htw 323

    Abstract: plji palce programming algorithm
    Text: COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-15/25. Q-20/25 MIL: H-15/20/25 PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Pin, function and fuse-map compatible with all GAL 20V8/AS ■ Electrically erasable CMOS technology pro­


    OCR Scan     		H-5/7/10/15/25, Q-10/15/25 H-15/25. Q-20/25 H-15/20/25 PALCE20V8 24-Pin 20V8/AS 24-p8 htw 323 plji palce programming algorithm PDF

    ce20V8

    Abstract: PALCE20V8H5JC5 GAL20V8 PAL20R8 PALCE20V8 AMD TOP-SIDE MARKING
    Text: COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-15/25, Q-20/25 PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic z\ Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Pin and function compatible with all GAL 20V8/As ■ Electrically erasable CMOS technology pro­


    OCR Scan     		H-5/7/10/15/25, Q-10/15/25 H-15/25, Q-20/25 PALCE20V8 24-Pin 20V8/As 025752b 003b7flà ce20V8 PALCE20V8H5JC5 GAL20V8 PAL20R8 AMD TOP-SIDE MARKING PDF