1001d
Abstract: No abstract text available
Text: CYPRESS PRELIMINARY C Y 7 C 95 4D X ATM HOTLink Transceiver Features technology, functionality, and integration over the field proven CY7B923/933 HOTLink. Second generation HOTLink technology UTOPIA level I and II compatible host bus interface Three-bit Multi-phy address capability built-in
|
OCR Scan
|
PDF
|
CY7B923/933
8B/10B
50-to-200
0G3G35Ã
709b0
1001d
|
Untitled
Abstract: No abstract text available
Text: PRELIMINARY CYPRESS 128Kx 8 Static RAM Features Functional D escription • High speed — t/\A = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW • Low standby power — 250 mW • 2.0V data retention optional — 100 jiW • Automatic power-down when
|
OCR Scan
|
PDF
|
CY7C109A
128Kx
CY7C109A
0233-A
25aibb2
|
Untitled
Abstract: No abstract text available
Text: PALCE20V8 9 1 / CYPRESS Features • Active pull-up on data input pins • Low power version 20V8L — 55 mA max. commercial (15,25 ns) — 65 mA max. military/industrial (15,25 ns) • Standard version has low power — 90 mA max. commercial (15,25 ns)
|
OCR Scan
|
PDF
|
PALCE20V8
20V8L)
PALCE20V8L-25QI
PALCE20V8Lâ
PALCE20V8L-25QC
PALCE20V8L-25JC
PALCE20V8L-25PC
24-Lead
PALCE20V8L-
15DMB
|
Untitled
Abstract: No abstract text available
Text: CY7C164A CY7C166A W CYPRESS 16K x 4 Static RAM Features Functional Description • High speed — 20 ns T he CY7C164A and CY7C166A are highperform ance CM O S static RAM s orga nized as 16,384 by 4 bits. Easy m em ory ex pansion is provided by an active LO W chip
|
OCR Scan
|
PDF
|
CY7C164A
CY7C166A
CY7C164A
CY7C166A
7C166A)
7C166A
|