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    CY7C1316V18

    Abstract: CY7C1318V18 CY7C1320V18
    Text: 316V18 316V18 CY7C1318V18 CY7C1320V18 ADVANCE INFORMATION 18-Mb 2-Word Burst SRAM with DDR-II Architecture Features Functional Description • 18-Mb Density 2M x 8, 1M x 18, 512K x 36 — Supports concurrent transactions • 300-MHz Clock for High Bandwidth


    Original     		316V18 CY7C1316V18 CY7C1318V18 CY7C1320V18 18-Mb 300-MHz CY7C1316V18 CY7C1318V18 CY7C1320V18 PDF