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    7C1354V25-100

    Abstract: CY7C1354 CY7C1354V25 CY7C1356V25 R1538
    Text: 356V25 CY7C1354V25 356V25 PRELIMINARY 256Kx36/512Kx18 Pipelined SRAM with NoBL Architecture Features • Pin compatible and functionally equivalent to ZBT™ • Supports 200-MHz bus operations with zero wait states — Data is transferred on every clock


    Original     		PDF 356V25 CY7C1354V25 CY7C1356V25 256Kx36/512Kx18 200-MHz 166-MHz 133-MHz 7C1354V25-100 CY7C1354 CY7C1354V25 CY7C1356V25 R1538