CY7C187
Abstract: CY7C187A
Text: CY7C187A 64K x 1 Static RAM Features provided by an active LOW chip enable CE and three-state drivers. The CY7C187A has an automatic power-down feature, reducing the power consumption by 55% when deselected. • High speed — 20 ns • CMOS for optimum speed/power
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CY7C187A
CY7C187A
CY7C187
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CY7C128A
Abstract: transistor C128 C128A 7C128A-45 7C128A-25
Text: 1CY 7C12 8A CY7C128A 2K x 8 Static RAM Features Functional Description • Automatic power-down when deselected • CMOS for optimum speed/power • High speed — 15 ns • Low active power — 440 mW commercial — 550 mW (military) • Low standby power
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CY7C128A
CY7C128A
transistor C128
C128A
7C128A-45
7C128A-25
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CY7C197
Abstract: No abstract text available
Text: CY7C197 256Kx1 Static RAM Features vided by an active LOW chip enable CE and three-state drivers. The CY7C197 has an automatic power-down feature, reducing the power consumption by 75% when deselected. • High speed — 12 ns Writing to the device is accomplished when the chip enable
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CY7C197
256Kx1
CY7C197
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FT6163
Abstract: No abstract text available
Text: FT6163/FT6163L Ultra High Speed 8K x 9 Static Cmos Rams FEATURES Data Retention with 2.0V Supply, 10 µA Typical Current 7163L Military) Common I/O Fully TTL Compatible Inputs and Outputs Standard Pinout (JEDEC Approved)
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FT6163/FT6163L
28-Pin
25/35ns
25/35/45ns
FT6163
FT6163L
728-bit
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PDF
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P4C148
Abstract: P4C149
Text: P4C148, P4C149 ULTRA HIGH SPEED 1K x 4 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Two Options – P4C148 Low Power Standby Mode – P4C149 Fast Chip Select Control High Speed Equal Access and Cycle Times – 10/12/15/20/25/35/45/55 ns (Commercial) – 15/20/25/35/45/55 ns (P4C148 Military)
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P4C148,
P4C149
P4C148
P4C149
096-bit
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P4C150
Abstract: No abstract text available
Text: P4C150 ULTRA HIGH SPEED 1K X 4 RESETTABLE STATIC CMOS RAM FEATURES Separate Input and Output Ports Full CMOS, 6T Cell Three-State Outputs High Speed Equal Access and Cycle Times – 10/12/15/20/25 ns (Commercial) – 15/20/25/35 ns (Military) Fully TTL Compatible Inputs and Outputs
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P4C150
24-Pin
28-Pin
P4C150
096-bit
requires300
SRAM105
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P4C147
Abstract: No abstract text available
Text: P4C147 ULTRA HIGH SPEED 4K x 1 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell Single 5V ± 10% Power Supply High Speed Equal Access and Cycle Times – 10/12/15/20/25 ns (Commercial) – 15/20/25/35 ns (Military) Separate Input and Output Ports Three-State Outputs
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P4C147
SRAM103
SRAM103
P4C147
Oct-05
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P4C168
Abstract: P4C169 P4C170
Text: P4C168, P4C169, P4C170 ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Fully TTL Compatible, Common I/O Ports High Speed Equal Access and Cycle Times – 12/15/20/25/35ns (Commercial) – 20/25/35/45/55/70ns (P4C168 Military) Three Options
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P4C168,
P4C169,
P4C170
12/15/20/25/35ns
20/25/35/45/55/70ns
P4C168
P4C169
P4C170
P4C168
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CY7C185A-20LMB
Abstract: C185A CY7C185 CY7C185A 624a2
Text: 1CY 7C18 5A CY7C185A 8K x 8 Static RAM Features • High speed — 20 ns • CMOS for optimum speed/power • Low active power — 743 mW • Low standby Power — 220 mW • TTL-compatible inputs and outputs • Easy memory expansion with CE1, CE2 and OE features
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CY7C185A
CY7C185A
300-mil-wide
CY7C185A-20LMB
C185A
CY7C185
624a2
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PDF
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Untitled
Abstract: No abstract text available
Text: P4C147 ULTRA HIGH SPEED 4K x 1 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell Single 5V ± 10% Power Supply High Speed Equal Access and Cycle Times – 10/12/15/20/25 ns (Commercial) – 15/20/25/35 ns (Military) Separate Input and Output Ports Three-State Outputs
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Original
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P4C147
SRAM103
SRAM103
P4C147
Oct-05
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PDF
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7cl6
Abstract: D-2501 CY7C161A CY7C162 CY7C162A
Text: CYPRESS SEMICONDUCTOR 4bE » B SSfl'lbfe.S □ QQbMSb b q c y p CY7C161A CY7C162A • - j/ "— = 16,384 x 4 Static RAV RAM Separate I/O SEMICONDUCTOR Features • Automatic power-down when dese lected • Transparent write 7C161A • CMOS for optimum speed/power
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CY7C161A
CY7C162A
7C161A)
CY7C162
au62A-35DMB
CY7C162Aâ
35KMB
CY7C162A-35LMB
CY7C162A-45DMB
7cl6
D-2501
CY7C162A
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CY7C263-35PC
Abstract: 7C261 CY7C263 CY7C26345DMB cerdip z PACKAGE 7C264 C261 CY7C261 CY7C264 f1b0
Text: CY7C261 CY7C263/CY7C264 CYPRESS Features • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 20 ns commercial — 25 ns (military) • Low power — 660 mW (commercial) — 770 m\V (military) • Super low standby power (7C261)
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OCR Scan
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CY7C261
C263/CY7C264
7C261)
300-mil
600-mil
CY7C261,
CY7C263,
CY7C264
8192-word
byGY7C264
CY7C263-35PC
7C261
CY7C263
CY7C26345DMB
cerdip z PACKAGE
7C264
C261
f1b0
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0148-t
Abstract: CY7C148 CY7C149 CY7C148-25DC up c1482 0148t L5045 CY7C148-35PC CY7C148-35DC MU 350
Text: CYPRESS SEMICONDUCTOR MbE D B DODbMll 2 5 0 ^ 2 b EÏCYP CY7C148 CY7C149 CYPRESS SEMICONDUCTOR Automatic power-down when dese lected 7C148 CMOS for optimum speed/power 25-ns access time Low active power — 440 mW (commercial) — 60S m\V (military) Low standby power (7C148)
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7C148)
25-ns
0GQb411
CY7C148
CY7C149
CY7C149-45KMB
CY7C149â
45LMB
0148-t
CY7C149
CY7C148-25DC
up c1482
0148t
L5045
CY7C148-35PC
CY7C148-35DC
MU 350
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7C192-12
Abstract: 7C192-15 7C192-20 A10C CY7C191 CY7C192 CY7C192-25PC
Text: MbE D CYPRESS SEMICON DUC TOR B 250^fc,b2 OOQfc.1,42 3 E 3 C Y P CY7C191 CY7C192 CYPRESS SEMICONDUCTOR Features • Automatic power-down when deselected • Transparent write 7C19X • CMOS for optimum speed/power • H ighspeed — tM = 25 ns • Low active power
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OCR Scan
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CY7C191
CY7C192
7C19X)
TheCY7C191
CY7C192
CY7C192-45VC
CY7C192-45DMB
CY7C192-45KMB
CY7C192â
45LMB
7C192-12
7C192-15
7C192-20
A10C
CY7C192-25PC
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7C192-12
Abstract: 7C192-15 A10C CY7C191 CY7C192 CY7C192-25PC
Text: CY7C191 CY7C192 ir CYPRESS 64K x 4 Static RAM with Separate I/O Features Functional Description • High speed T he CY7C191 and CY7C192 are high perform ance CM OS static RAM s orga nized as 65,536 x 4 bits with separate I/O. Easy m em ory expansion isprovided by ac
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CY7C191
CY7C192
CY7C191)
CY7C192
38-00076-J
tAW15!
tADvI15!
7C192-12
7C192-15
A10C
CY7C192-25PC
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7C168A
Abstract: CY7C168A CY7C169A 7C168 CY7C168A-25LMB
Text: CYPRESS SEM ICOND UC TO R MhE D ^ B 250^2 GODbSlM 5 O C V P ,7 ^ CY7C168A CY7C169A <VH 'V? -O 2> CYPRESS SEMICONDUCTOR Features Automatic pow er-dow n when dese lected 7C168A CMOS for optimum speed/power High speed — U a = 15 n s — tACE = 10ns(7C169A)
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CY7C168A
CY7C169A
7C168A)
7C169A)
7C168)
2001Velectrostatic
CY7C168A
CY7C169A
CY7CI68Ahas
CY7C169A-45FMB
7C168A
7C168
CY7C168A-25LMB
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AB26S
Abstract: 7C109A CY7C109 CY7C109A
Text: CY7C109A PRELIMINARY l ^wSSQBBSf S S ySSt Ì p YJe JkP XRI- XjiïJF ^ 128KX 8 Static RAM Features Functional Description • H ighspeed The CY7C109A is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable
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CY7C109A
128Kx
CY7C109A
AB26S
7C109A
CY7C109
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cy7c131-55nc
Abstract: ZT12 CY7C130 CY7C131 CY7C140 CY7C141 IDT7130 IDT7140
Text: CY7C130/CY7C131 CY7C140/CY7C141 W CYPRESS Features • 0.8-micron CMOS for optimum speed/power • Automatic power-down • TTL compatible • Capable o f withstanding greater than 2001V electrostatic discharge • Fully asynchronous operation • Master CY7C130/CY7C131 easily ex
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CY7C130/CY7C131
CY7C140/CY7C141
CY7C140/
CY7C141
CY7C130/
CY7C131;
IDT7130
IDT7140
cy7c131-55nc
ZT12
CY7C130
CY7C131
CY7C140
CY7C141
IDT7140
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automaticpower change over switch circuit diagram
Abstract: CY7C185 CY7C185A
Text: CY7C185A '* C YPRESS 8K x 8 Static RAM Features Functional D escription • High speed — 20 ns • CMOS for optimum speed/power T he CY7C185A is a high-perform ance CMOS static RA M organized as 8192 words by 8 bits. Easy mem ory expansion is provided by an active LO W chip enable
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OCR Scan
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CY7C185A
CY7C185A
300-miMilitary
CY7C185Aâ
25LMB
28-Pin
35DMB
28-Lead
automaticpower change over switch circuit diagram
CY7C185
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY SEMCONDUCTOR CY7B138 CY7B139 4K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features Functional Description • 0.8-micron BiCMOS for high per formance • High-speed access — 15 ns com’l — 25 ns (mil) • Automatic power-down • Fully asynchronous operation
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OCR Scan
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CY7B138
CY7B139
68-pin
CY7B138
CY7B139
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7B134 CY7B135 CY7B1342 F# CYPRESS 4K x 8 Dual-Port Static RAMs and 4K x 8 Dual-Port Static RAM with Semaphores Features Functional D escription • 0.8-micron BiCMOS for high performance T he CY7B134, CY7B135, and CY7B1342 are high-speed BiCMOS 4K x 8 dual-port
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CY7B134
CY7B135
CY7B1342
CY7B134,
CY7B135,
CY7B1342
GD15bDfl
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Untitled
Abstract: No abstract text available
Text: CY7C148 CY7C149 CYPRESS IK x 4 Static RAM Features • TTL-compatible inputs and outputs • Automatic power-down when dese lected 7C148 • CMOS for optimum speed/power • 25-ns access time • Low active power — 440 mW (commercial) — 605 mW (military)
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OCR Scan
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CY7C148
CY7C149
7C148)
25-ns
CY7C148
CY7C149
7C148
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PDF
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Untitled
Abstract: No abstract text available
Text: Features 32K x 8 Power-Switched and Reprogrammable PROM • Capable of withstanding > 4001V static discharge • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 25 ns commercial — 35 ns (military) • Low power — 275 mW (commercial)
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OCR Scan
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300-mil
CY7C271A
CY7C271A
768-word
7C271A
S50Tbb2
GG1530Q
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PDF
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Untitled
Abstract: No abstract text available
Text: CY7B144 CY7B145 8K x 8/9 Dual-Port Static RAM with Sem, Int, Busy Features Functional Description • 0.8-micron BiCMOS for high per formance • High-speed access — 15 ns commercial — 25 ns (military) The CY7B144 and CY7B145 are high speed BiCMOS 8K x 8 and 8K x 9 dual
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OCR Scan
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CY7B144
CY7B145
CY7B144
CY7B145
CY7B144/5
CY7B144/5
64-Kbit
16/18-bit
38-00163-E
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