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    512KX36 Search Results

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    K7Q161852A

    Abstract: K7Q161852A-FC10 K7Q161852A-FC13 K7Q161852A-FC16 K7Q163652A K7Q163652A-FC10 K7Q163652A-FC13 K7Q163652A-FC16
    Text: K7Q163652A K7Q161852A 512Kx36 & 1Mx18 QDRTM b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Revision History History Draft Date Remark 0.0 1. Initial document. April, 30, 2001 Advance 0.1 1. Amendment 1 Page 3,4 PIN NAME DESCRIPTION W 4A) : from Read Control Pin to Write Control


    Original     		PDF K7Q163652A K7Q161852A 512Kx36 1Mx18 512Kx36-bit, 1Mx18-bit K7Q161852A K7Q161852A-FC10 K7Q161852A-FC13 K7Q161852A-FC16 K7Q163652A K7Q163652A-FC10 K7Q163652A-FC13 K7Q163652A-FC16

    10D-11

    Abstract: K7R160982B K7R160982B-FC16 K7R160982B-FC20 K7R161882B K7R161882B-FC16 K7R161882B-FC20 K7R163682B K7R163682B-FC16 K7R163682B-FC20
    Text: K7R163682B K7R161882B K7R160982B 512Kx36 & 1Mx18 & 2Mx9 QDR TM II b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit, 2Mx9-bit QDRTM II b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Oct. 17, 2002 Advance 0.1 1. Change the Boundary scan exit order.


    Original     		PDF K7R163682B K7R161882B K7R160982B 512Kx36 1Mx18 512Kx36-bit, 1Mx18-bit, 10D-11 K7R160982B K7R160982B-FC16 K7R160982B-FC20 K7R161882B K7R161882B-FC16 K7R161882B-FC20 K7R163682B K7R163682B-FC16 K7R163682B-FC20

    K7Q161864B-FC16

    Abstract: D0-35 K7Q161864B K7Q163664B K7Q163664B-FC16
    Text: K7Q163664B K7Q161864B 512Kx36 & 1Mx18 QDRTM b4 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Jan. 27, 2004 Advance 1.0 1. Final spec release Mar. 18, 2004 Final Rev. No. The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the


    Original     		PDF K7Q163664B K7Q161864B 512Kx36 1Mx18 512Kx36-bit, 1Mx18-bit K7Q161864B-FC16 D0-35 K7Q161864B K7Q163664B K7Q163664B-FC16

    K7N161801A

    Abstract: K7N163601A
    Text: K7N163601A K7N161801A 512Kx36 & 1Mx18 Pipelined NtRAM TM Document Title 512Kx36 & 1Mx18-Bit Pipelined NtRAMTM Revision History Rev. No. History Draft Date Initial document. Add JTAG Scan Order Add x32 org and industrial temperature . Add 165FBGA package Speed bin merge.


    Original     		PDF K7N163601A K7N161801A 512Kx36 1Mx18 1Mx18-Bit 165FBGA K7N1636 K7N161801A K7N163601A

    D0-35

    Abstract: K7J161882B K7J161882B-FC16 K7J161882B-FC20 K7J161882B-FC25 K7J163682B K7J163682B-FC16 K7J163682B-FC20 K7J163682B-FC25
    Text: K7J163682B K7J161882B 512Kx36 & 1Mx18 DDR II SIO b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Dec. 16, 2002 Advance 0.1 1. Change the JTAG Block diagram Dec. 26, 2002 Preliminary


    Original     		PDF K7J163682B K7J161882B 512Kx36 1Mx18 512Kx36-bit, 1Mx18-bit 165FBGA D0-35 K7J161882B K7J161882B-FC16 K7J161882B-FC20 K7J161882B-FC25 K7J163682B K7J163682B-FC16 K7J163682B-FC20 K7J163682B-FC25

    Untitled

    Abstract: No abstract text available
    Text: K7A163608A K7A163208A K7A161808A PRELIMINARY 512Kx36/x32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/x32 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. 0.0 0.1 History Draft Date Remark 1. Initial draft 1. Add x32 org and industrial temperature


    Original     		PDF K7A163608A K7A163208A K7A161808A 512Kx36/x32 1Mx18 1Mx18-Bit

    K7A161801M

    Abstract: K7A163601M advh
    Text: K7A163601M K7A161801M 512Kx36 & 1Mx18 Synchronous SRAM Document Title 512Kx36 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft Jan. 18. 1999 Preliminary 0.1 1. Update ICC & ISB values. 2. Remove tCYC 117MHz -85


    Original     		PDF K7A163601M K7A161801M 512Kx36 1Mx18 1Mx18-Bit 117MHz 150mA 110mA 130mA K7A161801M K7A163601M advh

    NC-2H

    Abstract: K7B161825A K7B163225A K7B163625A
    Text: K7B163625A K7B163225A K7B161825A Preliminary 512Kx36/32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/x32 & 1Mx18-Bit Synchronous Burst SRAM Revision History Rev. No. 0.0 0.1 0.2 History 1. Initial draft 1. Add JTAG Scan Order 1. Add x32 org and industrial temperature .


    Original     		PDF K7B163625A K7B163225A K7B161825A 512Kx36/32 1Mx18 512Kx36/x32 1Mx18-Bit 165FBGA NC-2H K7B161825A K7B163225A K7B163625A

    K7N161801A

    Abstract: K7N163201A K7N163601A
    Text: K7N163601A K7N163201A K7N161801A Preliminary 512Kx36/32 & 1Mx18 Pipelined NtRAMTM Document Title 512Kx36/32 & 1Mx18-Bit Pipelined NtRAMTM Revision History Rev. No. 0.0 0.1 0.2 0.3 Draft Date History 1. Initial document. 1. Add JTAG Scan Order 1. Add x32 org and industrial temperature .


    Original     		PDF K7N163601A K7N163201A K7N161801A 512Kx36/32 1Mx18 1Mx18-Bit 165FBGA K7N1636 K7N161801A K7N163201A K7N163601A

    K7A161801A

    Abstract: K7A163201A K7A163601A
    Text: K7A163601A K7A163201A K7A161801A PRELIMINARY 512Kx36/32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/32 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. 0.0 0.1 0.2 History Draft Date Remark 1. Initial draft 1. Add x32 org and industrial temperature .


    Original     		PDF K7A163601A K7A163201A K7A161801A 512Kx36/32 1Mx18 1Mx18-Bit K7A1636 K7A161801A K7A163201A K7A163601A

    Untitled

    Abstract: No abstract text available
    Text: K7I163684B K7I161884B 512Kx36 & 1Mx18 DDRII CIO b4 SRAM 18Mb DDRII SRAM Specification 165FBGA with Pb & Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,


    Original     		PDF K7I163684B K7I161884B 512Kx36 1Mx18 165FBGA 11x15

    K7B161825A

    Abstract: K7B163625A
    Text: K7B163625A K7B161825A Preliminary 512Kx36 & 1Mx18 Synchronous SRAM 512Kx36 & 1Mx18-Bit Synchronous Burst SRAM FEATURES GENERAL DESCRIPTION • Synchronous Operation. • On-Chip Address Counter. • Self-Timed Write Cycle. • On-Chip Address and Control Registers.


    Original     		PDF K7B163625A K7B161825A 512Kx36 1Mx18 1Mx18-Bit 65V/-0 K7B161825A K7B163625A

    Untitled

    Abstract: No abstract text available
    Text: K7N163645A K7N163245A K7N161845A 512Kx36/32 & 1Mx18 Pipelined NtRAMTM Document Title 512Kx36/32 & 1Mx18-Bit Pipelined NtRAM TM Revision History History Draft Date Remark 1. Initial document. 1. Add JTAG Scan Order 1. Add x32 org and industrial temperature .


    Original     		PDF K7N163645A K7N163245A K7N161845A 512Kx36/32 1Mx18 1Mx18-Bit 165FBGA K7N1636

    Untitled

    Abstract: No abstract text available
    Text: IS61QDP2B41M18A IS61QDP2B451236A 1Mx18 , 512Kx36 18Mb QUAD-P Burst 4 SYNCHRONOUS SRAM (2.0 Cycle Read Latency) FEATURES •                    512Kx36 and 1Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		PDF IS61QDP2B41M18A IS61QDP2B451236A 1Mx18 512Kx36 1Mx18 400MHz 333MHz 300MHz

    Untitled

    Abstract: No abstract text available
    Text: IS61DDP2B21M18A IS61DDP2B251236A 1Mx18, 512Kx36 18Mb DDR-IIP Burst 2 CIO Synchronous SRAM (2.0 Cycle Read Latency) FEATURES •                   512Kx36 and 1Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		PDF IS61DDP2B21M18A IS61DDP2B251236A 1Mx18, 512Kx36 1Mx18 400MHz 333MHz 300MHz

    Untitled

    Abstract: No abstract text available
    Text: IS61QDP2B41M18A/A1/A2 IS61QDP2B451236A/A1/A2 1Mx18 , 512Kx36 18Mb QUADP Burst 4 SYNCHRONOUS SRAM (2.0 Cycle Read Latency) FEATURES •                     512Kx36 and 1Mx18 configuration available.


    Original     		PDF IS61QDP2B41M18A/A1/A2 IS61QDP2B451236A/A1/A2 1Mx18 512Kx36 1Mx18 13x15

    Untitled

    Abstract: No abstract text available
    Text: K7P163612M K7P161812M 512Kx36 & 1Mx18 SRAM Document Title 512Kx36 & 1Mx18 Synchronous Pipelined SRAM Register-Latch Revision History Rev. No. History Draft Date Remark Rev. 0.0 - Initial Document Aug. 2000 Advance Rev. 1.0 - V DDQ Min. changed to 1.4V - Package thermal characteristics added.


    Original     		PDF K7P163612M K7P161812M 512Kx36 1Mx18 27x16

    Untitled

    Abstract: No abstract text available
    Text: K7A163601A K7A163201A K7A161801A 512Kx36/32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/x32 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 0.1 0.2 Initial draft 1. Add x32 org and industrial temperature .


    Original     		PDF K7A163601A K7A163201A K7A161801A 512Kx36/32 1Mx18 512Kx36/x32 1Mx18-Bit K7A1636

    K7P161866M-HC30

    Abstract: No abstract text available
    Text: K7P163666M K7P161866M 512Kx36 & 1Mx18 SRAM Document Title 512Kx36 & 1Mx18 Synchronous Pipelined SRAM Revision History Rev. No. History Draft Date Remark Rev. 0.0 - Initial Document Apr. 2000 Advance Rev. 0.1 - Leakage current test condition changed from VDD to VDDQ


    Original     		PDF K7P163666M K7P161866M 512Kx36 1Mx18 -HC30 -HC25 27x16 K7P161866M-HC30

    Untitled

    Abstract: No abstract text available
    Text: K7P163666A K7P161866A Advance. 512Kx36 & 1Mx18 SRAM Document Title 512Kx36 & 1Mx18 Synchronous Pipelined SRAM Revision History Draft Date Remark - Initial Document Dec. 2001 Advance - Absolute maximum ratings are changed VDD : 2.815 - > 3.13 VDDQ : 2.815 - > 2.4


    Original     		PDF K7P163666A K7P161866A 512Kx36 1Mx18

    IR 10D 8A

    Abstract: No abstract text available
    Text: K7I163684B K7I161884B K7I160884B Advance 512Kx36 & 1Mx18 & 2Mx8 DDRII CIO b4 SRAM Document Title 512Kx36-bit, 1Mx18-bit, 2Mx8-bit DDRII CIO b4 SRAM Revision History Rev. No. 0.0 History 1. Initial document. Draft Date Remark Dec. 16, 2002 Advance The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the


    Original     		PDF K7I163684B K7I161884B K7I160884B 512Kx36 1Mx18 512Kx36-bit, 1Mx18-bit, IR 10D 8A

    Untitled

    Abstract: No abstract text available
    Text: K7M163635B K7M161835B 512Kx36 & 1Mx18 Flow-Through NtRAMTM 18Mb NtRAMTM Specification 100TQFP/165FBGA with Pb/Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,


    Original     		PDF K7M163635B K7M161835B 512Kx36 1Mx18 100TQFP/165FBGA

    Untitled

    Abstract: No abstract text available
    Text: User Guide for QDRII as QDRI 18Mb QDRI 2Burst B-die Preliminary 512Kx36 & 1Mx18 QDR TM b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Technical Note Revision History History Draft Date Remark 0.0 1. Initial document. April. 29, 2003 Advance 0.1 1. Delete the -20 speed bin part.


    Original     		PDF 512Kx36 1Mx18 512Kx36-bit, 1Mx18-bit 11x15

    Untitled

    Abstract: No abstract text available
    Text: n u N EW PRODUCT HB56G51236CC Series 524,288-WordX 36-Bit High Density Dynamic RAM Card 0H IT A C H 1 Rev.2 Ju n . 30,1992 Description The HB56G51236CC is a 512KX36 dynam ic RA M Card, mounted 4 pieces of 4M bit D RA M HM 514900LTT sealed in T S O P package.


    OCR Scan     		PDF HB56G51236CC 288-WordX 36-Bit 512KX36 514900LTT) 88-pin