54AC11074 Search Results

Contextual Info: 54AC11074,74AC11074 DUAL D-TYPE POSUIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET D2957, D E C E M B E R 1986 - REVISED A P R IL 1983 54AC11074. . . J PACKAGE 74AC11074. . . D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout

54AC11074J

Abstract: D2957 VR 10K preset 74AC11074 MJAR
Contextual Info: 54AC11074, 74AC11074 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET _ D2957, DECEMBER 1986 - REVISED APRIL 1993 * Flow-Through Architecture Optimizes * * * * 54A C 11074. . . J PACKAGE 74AC11074 . . . D, N, OR PW PACKAGE

AC11074

Abstract: 74AC 74AC11074 D2957 T10064-D2957
Contextual Info: 54AC11074, 74AC11074 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET TI0064— D2957, DECEMBER 1986— REVISED MARCH 1990 5 4A C 11 0 74 . . . J P A C K A G E 74A C 11074 . . . D O R N PACKAGE Flow-Through Architecture to Optimize PCB

AC11074

Contextual Info: 54AC11074, 74AC11074 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET TI0064—02957, DECEMBER 1986—REVISED MARCH 1990 • Flow-Through Architecture to Optimize PCB Layout 54AC11074 . . . J PACKAGE 74AC11074 . . . O OR N PACKAGE TOP VIEW

DIODE SMD V05

Abstract: qml-38535 ST E438 54AC74 CDFP2-F14 F8859 GDFP1-F14 V05 SMD CODE MARKING
Contextual Info: REVISIONS LTR DESCRIPTION Add vendor CAGE F8859. Add device class V criteria. Changes to table I. Corrected terminal connections for device type 02. Editorial changes throughout, - DATE YR-MO-DA APPROVED

5962L0053605VYC

Abstract: 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA
Contextual Info: NOT MEASUREMENT SENSITIVE MIL-HDBK-103AJ 19 SEPTEMBER 2011 SUPERSEDING MIL-HDBK-103AH 28 MARCH 2011 DEPARTMENT OF DEFENSE HANDBOOK LIST OF STANDARD MICROCIRCUIT DRAWINGS This handbook is for guidance only. Do not cite this document as a requirement. AMSC N/A