SMJ44400
Abstract: No abstract text available
Text: SMJ44400 1 048 576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY SGMS041D – JANUARY 1991 – REVISED JUNE 1995 D D D D D D D D D D D D D Processed to MIL-STD-883, Class B Organization . . . 1 048 576 x 4 Single 5-V Power Supply ±10% Tolerance Performance Ranges:
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SMJ44400
576-WORD
SGMS041D
MIL-STD-883,
SMJ44400-80
SMJ44400-10
SMJ44400-12
SMJ44400
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TM124GU8A
Abstract: CI 576 TM124GU8A-60 TM124GU8A-70 TM124GU8A-80 TMS44400
Text: TM124GU8A 1 048 576-WORD BY 8-BIT DYNAMIC RANDOM-ACCESS MEMORY MODULE SMMS181A–JANUARY 1991–REVISED JANUARY 1993 • • • • • • • • Organization . . . 1 048 576 x 8 Single 5-V Power Supply ±10% Tolerance 30-Pin Single In-Line Memory Module
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TM124GU8A
576-WORD
SMMS181A
30-Pin
TM124GU8A
TM124GU8A-60
TM124GU8A-70
TM124GU8A-80
CI 576
TM124GU8A-60
TM124GU8A-70
TM124GU8A-80
TMS44400
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WOLA reference
Abstract: matched filter matlab codes wola 0W344-004-XTP 0W344-005-XTP 0W588-002-XUA circuit diagram of rc transmitter and receiver schematic diagram bluetooth dongle CSP Bluetooth Development Kit
Text: BelaSigna 200 1.0 General Description BelaSigna 200 is a high-performance, programmable, mixed-signal digital signal processor DSP that is based on ON Semiconductor’s patented second-generation SignaKlara technology. This single-chip solution is ideally suited for embedded applications where audio performance, low power consumption and
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MSM531602C
Abstract: O443 C738
Text: O K I Semiconductor MSM531602C 1 ,048,576-W ord x 16-B it o r 2,097,152-W o rd x 8-B it M ask ROM DESCRIPTION The OKI MSM531602C is a high-speed CMOS Mask ROM that can electrically switch between 1 048 576word x 16-bit or 2,097,152-word x 8-bit configurations. The MSM531602 operates on a single 5.0 V power
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MSM531602C
576-Word
16-Bit
152-Word
MSM531602C
MSM531602
O443
C738
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TM124EAD9C
Abstract: TM124EAD9B-6
Text: TM124EAD9B, TM124EAD9C 1 048 576-WORD BY 9-BIT DYNAMIC RANDOM-ACCESS MEMORY MODULES SMMS191 — JANUARY 1991 This Data Sheet is Applicable to A ll TM124EAD9BS and TM124EAD9CS Symbolized with Revision "B" and Subsequent Revisions as Described on Page 6-44.
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TM124EAD9B,
TM124EAD9C
576-WORD
SMMS191
TM124EAD9BS
TM124EAD9CS
30-Pin
TM124EAD9B
TM124EAD9C
124EAD9B/C-6
TM124EAD9B-6
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TMS44410
Abstract: TMS44410-70
Text: TMS44410 1 048 576-WORD BY 4-BIT WRITE-PER-BIT DYNAMIC RANDOM-ACCESS MEMORY REV A - • Organization . . . 1 048 576 x 4 SMHS441 JANUARY 1991 DM and DJ Packaget Top View • Single 5-V Power Supply (±10% Tolerance) • Performance Ranges: ACCESS ACCESS ACCESS
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TMS44410
576-WORD
SMHS441
TMS44410-60
TMS44410-70
TMS44410-80
TMS44410-10
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Untitled
Abstract: No abstract text available
Text: TMS416160, TMS416160P 1 048 576-WORD BY 16-BIT HIGH-SPEED DYNAMIC RANDOM-ACCESS MEMORIES SMKS660-DECEMBER 1992 Organization. . . 1 048 576 x 16 RE P A C K A G E t DC P A C K AG E t TOP VIEW (TOP VIEW) Single 5-V Supply (10% Tolerance) '416160/P-60 '416160/P-70
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TMS416160,
TMS416160P
576-WORD
16-BIT
SMKS660-DECEMBER
416160/P-60
416160/P-70
416160/P-80
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TS-2321
Abstract: No abstract text available
Text: SMJ44400 1 048 576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY SGMS041D - JANUARY 1991 - REVISED JUNE 1995 Processed to MIL-STD-883, Class B Organization. . . 1 048 576 x 4 Single 5-V Power Supply ±10% Tolerance Performance Ranges: A CCESS ACCESS A CCESS
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SMJ44400
576-WORD
SGMS041D
MIL-STD-883,
SMJ44400-80
SMJ44400-10
SMJ44400-12
TS-2321
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TMS44400
Abstract: TMS44400-10
Text: TMS44400 1 048 576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY R E V A — S M H S 4 4 0 B — O C T O B E R 1 9 8 9 — R E V IS E D J A N U A R Y 1991 DM AND DJ P acka ge st Top View This Data Sheet Is Applicable to A ll TMS44400s Symbolized With Revision “B" and Subsequent
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TMS44400
576-WORD
TMS44400s
TMS44400-60
TMS44400-70
TMS44400-80
TMS44400-10
SMHS440B
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TMS626812
Abstract: No abstract text available
Text: TMS626812 1048576-WORD BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY _ SMOS687A -JULY 1 9 9 6- REVISED APRIL 1997 • • • Organization . . . 1M x 8 x 2 Banks 3.3-V Power Supply ± 10% Tolerance Two Banks for On-Chip Interleaving
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TMS626812
1048576-WORD
SMOS687A
83-MHz
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET NEC MOS INTEGRATED CIRCUIT M PD4516421,4516821,4516161 16M bit Synchronous DRAM Description The UPD4516421, UPD4516821, uPD 4516161 are high-speed 16 777 2 1 6-bit synchronous dynamic random-access memories, each organized as 2 097 152-word x
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PD4516421
UPD4516421,
UPD4516821,
152-word
576-word
288-word
x16-bit
400-mil
44-pin
400-mil,
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Untitled
Abstract: No abstract text available
Text: MITSUBISHI LSIs M 5M 54R 01J-12,-15 1997.11.20 Rev.F 4 1 9 4 3 0 4 -B IT 4 1 9 4 3 0 4 -W O R D BY 1 -B IT C M O S S T A T IC RAM DESCRIPTIO N The M 5M 54R01J is a family of 4194304-word by 1-bit static PIN C O N FIG U R A TIO N (TO P V IE W ) RAMs, fabricated with the high performance CM OS silicon gate
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01J-12
54R01J
4194304-word
32-pin
32P0K
J32-P-400-1
32pin
400mil
MO-061
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424400LA-70
Abstract: No abstract text available
Text: NEC MOS INTEGRATED CIRCUIT ¿¿PD42S4400L, 424400L 3.3 V OPERATION 4 M-BIT DYNAMIC RAM 1 M-WORD BY 4-BIT, FAST PAGE MODE Description The /xPD42S4400L, 424400L are 1 048 576 words by 4 bits dynamic C M O S RAMs. The fast page mode capability realize high speed access and low power consumption.
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uPD42S4400L
uPD424400L
/xPD42S4400L,
424400L
iPD42S4400L
26-pin
043tg
094i8
424400LA-70
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nec A2C
Abstract: No abstract text available
Text: MOS INTEGRATED CIRCUIT ju P D 4 2 S 1 6 1 6 5 L , 4 2 1 6 1 6 5 L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, HYPER PAGE MODE, BYTE READ/WRITE MODE Description The|iPD42S16165L, 4216165Lare 1 048 576 w ords by 16 bits dynamic CMOS RAMs w ith optional hyper page
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16-BIT,
uPD42S16165L
uPD4216165L
/JPD42S16165L,
4216165L
50-pin
42-pin
pPD42S16165L-A60,
4216165L-A60
/iPD42Sl6165L-A70,
nec A2C
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NEC 4216160
Abstract: No abstract text available
Text: MOS INTEGRATED CIRCUIT f iPD42S16160,4216160,42S18160,4218160 16 M -BIT DYNAM IC RAM 1 M -W ORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE DESCRIPTION The mPD42S16160, 4216160, 42S18160, 4218160 are 1 048 576 words by 16 bits dynamic CMOS RAMs. These differ in refresh cycle and the /iPD42S16160, 42S18160 can execute CAS before RAS self refresh (see
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uPD42S16160
uPD4216160
uPD42S18160
uPD4218160
16-BIT,
42S16160,
42S18160,
/iPD42S16160,
42S18160
50-pin
NEC 4216160
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uPD424400
Abstract: d424400 *424400v DD41A
Text: [• r b4B7SES QDMlôbb T7Ô AT A SHEET NEC MOS INTEGRATED CIRCUIT ¿¿PD424400 4 M-BIT DYNAMIC RAM 1 M-WORD BY 4-BIT, FAST PAGE MODE DESCRIPTION The /¿PD424400 is a 1 048 576 w ords by 4 bits dynam ic CMOS RAM. The fast page mode capability realize high speed access and lo w power consum ption.
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uPD424400
PD424400
26-pin
20-pin
VP15-207-2
IR35-207-2
//PD424400V
PD424400V.
d424400
*424400v
DD41A
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Untitled
Abstract: No abstract text available
Text: TMS428160, TMS428160P 1 048 576-WORD BY 16-BIT HIGH-SPEED LOW VOLTAGE DYNAMIC RANDOM-ACCESS MEMORIES Organization . . . 1 048 576 x 16 DC PACKAGET TOP VIEW (TOP VIEW) Single 3.3-V Supply (±0.3V Tolerance) Performance Ranges: '428160/P-70 '428160/P-80 ACCESS ACCESS ACCESS READ OR
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TMS428160,
TMS428160P
576-WORD
16-BIT
SMKS286-DECEMBER
428160/P-70
428160/P-80
1024-Cycle
TMS428160P)
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Untitled
Abstract: No abstract text available
Text: TMS46400, TMS46400P 1 048 576-WORD BY 4-BIT LOW-VOLTAGE DYNAMIC RANDOM-ACCESS MEMORIES SMHS464-JANUARY 1993 SD PACKAGEt TOP VIEW DJ PACKAGEt (TOP VIEW) Single 3.3-V Power Supply (±0.3-V Tolerance) DQ1 C Low Power Dissipation (TMS46400P) - 200 mA CMOS Standby
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TMS46400,
TMS46400P
576-WORD
SMHS464-JANUARY
TMS46400P)
TMS46400/P-70
TMS46400/P-80
TMS46400/P-10
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Untitled
Abstract: No abstract text available
Text: SMJ44400 1 048 576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY S G M S 0 4 1 B -JA N U A R Y 19 9 1 -R E V IS E D JULY 1991 JD A N D HR P A C K A G E S t TOP VIEW Processed to MIL-STD-883, Class B Military Temperature Range . . . - 5 5 to 125°C C 1 C 2 w C3
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SMJ44400
576-WORD
MIL-STD-883,
SMJ44400-80
SMJ44400-10
SMJ44400-12
SGMS041B-JANUARY
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pjuaa
Abstract: 1993 SDRAM 7216B
Text: 16 777 216 BIT SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY S M 0 S6 82-J A N U A R Y 1993 DGE PACKAG ET TOP VIEW Organization. . . 1M x 8 x 2 Banks 3.3 V-Power Supply (10% Tolerance) Two Banks For On-Chip Interleaving (Gapless Accesses) * High Bandwidth - Up to 100-MHz Data
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40must
pin35must
SDRAM-15
pjuaa
1993 SDRAM
7216B
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MSM538002C
Abstract: SM535
Text: O K I Semiconductor MSM538002C r 524,288-Word x 16-Bit or 1,048,576-Word x 8-Bit Mask ROM ~~ ~ D E S C R IP TIO N The OKI MSM538002C is a high-speed CMOS Mask ROM that can electrically switch between 524 288word x 16-bit and 1,048 576-word x 8-bit configurations. The MSM538002C operates o n X * 5 0 V
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MSM538002C
288-Word
16-Bit
576-Word
SM535Â
SandPS10n"
SM535
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Untitled
Abstract: No abstract text available
Text: NEC MOS INTEGRATED CIRCUIT juPD42S4400L, 424400L 3.3 V OPERATION 4 M BIT DYNAMIC RAM 1 M-WORD BY 4-BIT, FAST PAGE MODE Description The /¿PD42S4400L, 424400L are 1 048 576 w ords by 4 bits dynam ic CMOS RAMs. The fast page mode capability realize high speed access and low power consumption.
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juPD42S4400L
424400L
PD42S4400L,
424400L
PD42S4400L
26-pin
//PD42S4400L
PD42S4400L
cycles/128
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Untitled
Abstract: No abstract text available
Text: DATA SHEET NEC MOS INTEGRATED CIRCUIT /¿PD424400 4M-BIT DYNAMIC RAM 1 M-WORD BY 4-BIT, FAST PAGE MODE Description The ftP 0424400 is a 1 048 576 words by 4 bits dynamic CMOS RAM. The fast page mode capability realize high speed access and low power consumption.
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PD424400
26-pin
JPD424400-60
PD424400-70
/1PD424400-80
1PD424400-10
VP15-207-2
b427525
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ao21
Abstract: No abstract text available
Text: MITSUBISHI LSIs M 5 M 5 4 R 0 1 J - 1 2 ,- 1 5 1997.11.20 Rev.F 4194304-BIT 4194304-WQRD BY 1-BIT CMOS STATIC RAM DESCRIPTION The M5M54R01J is a fam ily of 4194304-w ord by 1-bit static PIN CONFIGURATION (TOP VIEW) RAMs, fabricated with the high performance CMOS silicon gate
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4194304-BIT
4194304-WQRD
M5M54R01J
4194304-w
32-pin
M5M54R01J-12
4194304-WORD
ao21
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