K7Q161852A
Abstract: K7Q161852A-FC10 K7Q161852A-FC13 K7Q161852A-FC16 K7Q163652A K7Q163652A-FC10 K7Q163652A-FC13 K7Q163652A-FC16
Text: K7Q163652A K7Q161852A 512Kx36 & 1Mx18 QDRTM b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Revision History History Draft Date Remark 0.0 1. Initial document. April, 30, 2001 Advance 0.1 1. Amendment 1 Page 3,4 PIN NAME DESCRIPTION W 4A) : from Read Control Pin to Write Control
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K7Q163652A
K7Q161852A
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit
K7Q161852A
K7Q161852A-FC10
K7Q161852A-FC13
K7Q161852A-FC16
K7Q163652A
K7Q163652A-FC10
K7Q163652A-FC13
K7Q163652A-FC16
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10D-11
Abstract: K7R160982B K7R160982B-FC16 K7R160982B-FC20 K7R161882B K7R161882B-FC16 K7R161882B-FC20 K7R163682B K7R163682B-FC16 K7R163682B-FC20
Text: K7R163682B K7R161882B K7R160982B 512Kx36 & 1Mx18 & 2Mx9 QDR TM II b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit, 2Mx9-bit QDRTM II b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Oct. 17, 2002 Advance 0.1 1. Change the Boundary scan exit order.
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K7R163682B
K7R161882B
K7R160982B
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit,
10D-11
K7R160982B
K7R160982B-FC16
K7R160982B-FC20
K7R161882B
K7R161882B-FC16
K7R161882B-FC20
K7R163682B
K7R163682B-FC16
K7R163682B-FC20
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K7Q161864B-FC16
Abstract: D0-35 K7Q161864B K7Q163664B K7Q163664B-FC16
Text: K7Q163664B K7Q161864B 512Kx36 & 1Mx18 QDRTM b4 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Jan. 27, 2004 Advance 1.0 1. Final spec release Mar. 18, 2004 Final Rev. No. The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
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K7Q163664B
K7Q161864B
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit
K7Q161864B-FC16
D0-35
K7Q161864B
K7Q163664B
K7Q163664B-FC16
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D0-35
Abstract: K7J161882B K7J161882B-FC16 K7J161882B-FC20 K7J161882B-FC25 K7J163682B K7J163682B-FC16 K7J163682B-FC20 K7J163682B-FC25
Text: K7J163682B K7J161882B 512Kx36 & 1Mx18 DDR II SIO b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Dec. 16, 2002 Advance 0.1 1. Change the JTAG Block diagram Dec. 26, 2002 Preliminary
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K7J163682B
K7J161882B
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit
165FBGA
D0-35
K7J161882B
K7J161882B-FC16
K7J161882B-FC20
K7J161882B-FC25
K7J163682B
K7J163682B-FC16
K7J163682B-FC20
K7J163682B-FC25
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Untitled
Abstract: No abstract text available
Text: K7I163684B K7I161884B 512Kx36 & 1Mx18 DDRII CIO b4 SRAM 18Mb DDRII SRAM Specification 165FBGA with Pb & Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
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K7I163684B
K7I161884B
512Kx36
1Mx18
165FBGA
11x15
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Untitled
Abstract: No abstract text available
Text: ADVANCE 512K x 18 2.5V VDD, HSTL, QDRb4 SRAM 9Mb QDR SRAM MT54V512H18E 4-Word Burst FEATURES • 9Mb Density 512Kx18 • Separate independent read and write data ports with concurrent transactions • 100% bus utilization DDR READ and WRITE operation
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MT54V512H18E
512Kx18)
MT54V512H18E
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Untitled
Abstract: No abstract text available
Text: ADVANCE 512K x 18 2.5V VDD, HSTL, QDRb2 SRAM 9Mb QDR SRAM MT54V512H18A 2-Word Burst FEATURES 165-Pin FBGA • 9Mb Density 512K x 18 • Separate independent read and write data ports with concurrent transactions • 100% bus utilization DDR READ and WRITE
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MT54V512H18A
165-Pin
MT54V512H18A
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Untitled
Abstract: No abstract text available
Text: 256K x 36 2.5V VDD, HSTL, PIPELINED DDR SRAM 9Mb DDR SRAM MT57V256H36P FEATURES • • • • • • • • • • • • • • • • • • 165-Ball FBGA Fast cycle times: 5ns and 6ns 256K x 36 configuration Pipelined double data rate operation
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MT57V256H36P
165-Ball
MT57V256H36P
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Untitled
Abstract: No abstract text available
Text: ADVANCE‡ 256K x 36 2.5V VDD, HSTL, PIPELINED DDR SRAM 9Mb DDR SRAM MT57V256H36P FEATURES • • • • • • • • • • • • • • • • • • 165-Pin FBGA Fast cycle times: 3.3ns, 4ns, 5ns and 6ns 256K x 36 configuration Pipelined double data rate operation
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MT57V256H36P
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Untitled
Abstract: No abstract text available
Text: ADVANCE 512K x 18 2.5V VDD, HSTL, QDRb2 SRAM 9Mb QDR SRAM MT54V512H18A 2-Word Burst FEATURES 165-Pin FBGA • 9Mb Density 512K x 18 • Separate independent read and write data ports with concurrent transactions • 100% bus utilization DDR READ and WRITE
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MT54V512H18A
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Untitled
Abstract: No abstract text available
Text: ADVANCE 512K x 18 2.5V VDD, HSTL, QDRb4 SRAM 9Mb QDR SRAM MT54V512H18E 4-Word Burst FEATURES • 9Mb Density 512Kx18 • Separate independent read and write data ports with concurrent transactions • 100% bus utilization DDR READ and WRITE operation
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512Kx18)
MT54V512H18E
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Untitled
Abstract: No abstract text available
Text: K7Q323684M K7Q321884M 1Mx36 & 2Mx18 Preliminary b4 SRAM QDRTM Document Title 1Mx36-bit, 2Mx18-bit QDRTM SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. September 5, 2001 Advance 0.1 1. Changed Pin configuration at x36 organization.
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K7Q323684M
K7Q321884M
1Mx36
2Mx18
1Mx36-bit,
2Mx18-bit
K7Q3236
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Untitled
Abstract: No abstract text available
Text: K7Q323682M K7Q321882M 1Mx36 & 2Mx18 Preliminary b2 SRAM QDRTM Document Title 1Mx36-bit, 2Mx18-bit QDRTM SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. September, 5 2001 Advance 0.1 1. Changed Pin configuration at x36 organization.
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K7Q323682M
K7Q321882M
1Mx36
2Mx18
1Mx36-bit,
2Mx18-bit
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Untitled
Abstract: No abstract text available
Text: K7R323684C K7R321884C K7R320984C Preliminary TM 1Mx36, 2Mx18 & 4Mx9 QDR II b4 SRAM 36Mb QDRII SRAM Specification 165 FBGA with Pb & Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
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K7R323684C
K7R321884C
K7R320984C
1Mx36,
2Mx18
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JTAG 10P
Abstract: K7R641882M-FC25 K7R640982M-FC25 K7R643682M-FC20
Text: K7R643682M K7R641882M K7R640982M Preliminary 2Mx36 & 4Mx18 & 8Mx9 QDRTM II b2 SRAM Document Title 2Mx36-bit, 4Mx18-bit, 8Mx9-bit QDRTM II b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Sep, 14 2002 Advance 0.1 1. Update AC timing characteristics.
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K7R643682M
K7R641882M
K7R640982M
2Mx36
4Mx18
2Mx36-bit,
4Mx18-bit,
K7R640982M
JTAG 10P
K7R641882M-FC25
K7R640982M-FC25
K7R643682M-FC20
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PDF
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Untitled
Abstract: No abstract text available
Text: K7R323682M K7R321882M K7R320982M K7R320882M 1Mx36 & 2Mx18 & 4Mx9 & 4Mx8 QDRTM II b2 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx9-bit, 4Mx8-bit QDR TM II b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. June, 30 2001 Advance 0.1
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K7R323682M
K7R321882M
K7R320982M
K7R320882M
1Mx36
2Mx18
1Mx36-bit,
2Mx18-bit,
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K7R643684
Abstract: No abstract text available
Text: K7R643684M K7R641884M 2Mx36 & 4Mx18 QDRTM II b4 SRAM 72Mb M-die QDRII SRAM Specification 165 FBGA with Pb & Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
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K7R643684M
K7R641884M
2Mx36
4Mx18
11x15
K7R643684
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PDF
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Untitled
Abstract: No abstract text available
Text: K7I643682M K7I641882M 2Mx36 & 4Mx18 DDRII CIO b2 SRAM 72Mb DDRII SRAM Specification 165 FBGA with Pb & Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
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K7I643682M
K7I641882M
2Mx36
4Mx18
11x15
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PDF
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Untitled
Abstract: No abstract text available
Text: User Guide for QDRII as QDRI 18Mb QDRI 2Burst B-die Preliminary 512Kx36 & 1Mx18 QDR TM b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Technical Note Revision History History Draft Date Remark 0.0 1. Initial document. April. 29, 2003 Advance 0.1 1. Delete the -20 speed bin part.
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512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit
11x15
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PDF
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Untitled
Abstract: No abstract text available
Text: K7Q163664B K7Q161864B 512Kx36 & 1Mx18 QDRTM b4 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Jan. 27, 2004 Advance 1.0 1. Final spec release Mar. 18, 2004 Final 1.1 1. Added the Part no. of Pb Free Package on page.2
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K7Q163664B
K7Q161864B
512Kx36-bit,
1Mx18-bit
512Kx36
1Mx18
K7Q1636lid
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PDF
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Untitled
Abstract: No abstract text available
Text: K7Q323652M K7Q321852M 1Mx36 & 2Mx18 Preliminary b2 SRAM QDRTM Document Title 1Mx36-bit, 2Mx18-bit QDRTM SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. Sep. 5. 2001 Advance 0.1 1. Reserved pin for high density name change from NC to Vss/SA
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K7Q323652M
K7Q321852M
1Mx36-bit,
2Mx18-bit
1Mx36
2Mx18
-20part
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PDF
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Untitled
Abstract: No abstract text available
Text: K7I323684C K7I321884C Preliminary 1Mx36 & 2Mx18 DDRII CIO b4 SRAM 36Mb DDRII SRAM Specification 165 FBGA with Pb & Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
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K7I323684C
K7I321884C
1Mx36
2Mx18
11x15
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PDF
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Untitled
Abstract: No abstract text available
Text: K7J643682M K7J641882M Preliminary 2Mx36 & 4Mx18 DDR II SIO b2 SRAM Document Title 2Mx36-bit, 4Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Mar. 9, 2003 Advance 0.1 1. Correct the JTAG ID register definition
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K7J643682M
K7J641882M
2Mx36
4Mx18
2Mx36-bit,
4Mx18-bit
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PDF
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Untitled
Abstract: No abstract text available
Text: Samsung Samsung Secret Secret SAMSUNG QDRII+/DDRII+ 16Mb C-die Specification Change Notice July, 2008 Product Planning & Application Engineering Team MEMORY DIVISION SAMSUNG ELECTRONICS Co., LTD Product Product Planning Planning & & Application Application Eng.
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K7K1636T2C
K7K1618T2C
512Kx36
K7S1636T4C
K7S1618T4C
1Mx18
11x15
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PDF
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