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    6 INPUTS OR GATE Search Results

    6 INPUTS OR GATE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67H481FTG Toshiba Electronic Devices & Storage Corporation Stepping and Brushed Motor Driver /Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / IN input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    TLX9188 Toshiba Electronic Devices & Storage Corporation Photocoupler (phototransistor output), DC input, 3750 Vrms, SO6, Automotive Visit Toshiba Electronic Devices & Storage Corporation
    TB67H480FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=50/Iout(A)=2.5/ PHASE input type Visit Toshiba Electronic Devices & Storage Corporation
    TB67H481FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=50/Iout(A)=2.5/ IN input type Visit Toshiba Electronic Devices & Storage Corporation
    5400/BCA Rochester Electronics LLC NAND GATE; QUAD 2-INPUT Visit Rochester Electronics LLC Buy

    6 INPUTS OR GATE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    AC86

    Abstract: ti AC86 SN54AC86 SN74AC86 SN74AC86D SN74AC86DBR SN74AC86DR SN74AC86N SN74AC86NSR SN74AC86PWR
    Text: SN54AC86, SN74AC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SCAS533B – AUGUST 1995 – REVISED SEPTEMBER 2002 D D D SN54AC86 . . . J OR W PACKAGE SN74AC86 . . . D, DB, N, NS, OR PW PACKAGE TOP VIEW 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 9 ns at 5 V


    Original     		PDF SN54AC86, SN74AC86 SCAS533B SN54AC86 AC86 ti AC86 SN54AC86 SN74AC86 SN74AC86D SN74AC86DBR SN74AC86DR SN74AC86N SN74AC86NSR SN74AC86PWR

    Untitled

    Abstract: No abstract text available
    Text: ZL40221 Precision 2:6 LVDS Fanout Buffer with Glitchfree Input Reference Switching and On-Chip Input Termination Data Sheet April 2014 Features Ordering Information ZL40221LDG1 ZL40221LDF1 Inputs/Outputs • Accepts two differential or single-ended inputs


    Original     		PDF ZL40221 ZL40221LDG1 ZL40221LDF1 -40oC

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original     		PDF SN54AC10, SN74AC10 SCAS529D SN54AC10

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS529C – AUGUST 1995 – REVISED SEPTEMBER 2002 D D D 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original     		PDF SN54AC10, SN74AC10 SCAS529C SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original     		PDF SN54AC10, SN74AC10 SCAS529D SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original     		PDF SN54AC10, SN74AC10 SCAS529D SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original     		PDF SN54AC10, SN74AC10 SCAS529D SN54AC10 independe1995 4040064/F MO-153

    Untitled

    Abstract: No abstract text available
    Text: SN54AC10, SN74AC10 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003 D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE


    Original     		PDF SN54AC10, SN74AC10 SCAS529D SN54AC10 SN74AC10 SN74AC10N SN74AC10D SN74AC10DR SN74AC10NSR

    HI-8482

    Abstract: No abstract text available
    Text: HI-8482 ARINC 429 DUAL LINE RECEIVER The self-test inputs force the outputs to either a ZERO, ONE, or NULL state for system tests. While in self-test mode, the ARINC inputs are ignored. IN2B - 4 OUT2B - 5 IN2A - 6 CAP2A - 7 OUT2A - 8 All the ARINC inputs have built-in hysteresis to reject


    Original     		PDF HI-8482 HI-8482 RM3183. 20-PIN

    HC132

    Abstract: HC00 SN54HC132 SN74HC132 SN74HC132D SN74HC132DBR SN74HC132DR SN74HC132N SN74HC132NSR
    Text: SN54HC132, SN74HC132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS034D – DECEMBER 1982 – REVISED DECEMBER 2002 D D D SN54HC132 . . . J OR W PACKAGE SN74HC132 . . . D, DB, N, NS, OR PW PACKAGE TOP VIEW Wide Operating Voltage Range of 2 V to 6 V


    Original     		PDF SN54HC132, SN74HC132 SCLS034D SN54HC132 HC132 HC00 SN54HC132 SN74HC132 SN74HC132D SN74HC132DBR SN74HC132DR SN74HC132N SN74HC132NSR

    SCLS034

    Abstract: No abstract text available
    Text: SN54HC132, SN74HC132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS034D – DECEMBER 1982 – REVISED DECEMBER 2002 D D D SN54HC132 . . . J OR W PACKAGE SN74HC132 . . . D, DB, N, NS, OR PW PACKAGE TOP VIEW Wide Operating Voltage Range of 2 V to 6 V


    Original     		PDF SN54HC132, SN74HC132 SCLS034D SN54HC132 SN74HC132 SCLS034

    Untitled

    Abstract: No abstract text available
    Text: SN54AC14, SN74AC14 HEX SCHMITT-TRIGGER INVERTERS SCAS522E – AUGUST 1995 – REVISED SEPTEMBER 2002 D D D 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 9.5 ns at 5 V SN54AC14 . . . J OR W PACKAGE SN74AC14 . . . D, DB, N, NS, OR PW PACKAGE


    Original     		PDF SN54AC14, SN74AC14 SCAS522E SN54AC14 SN74AC14N SN74AC14D SN74AC14DR SN74AC14NSR SN74AC14DBR SN74AC14PWR

    HA132

    Abstract: A115-A C101 SN54AHC132 SN74AHC132
    Text: SN54AHC132, SN74AHC132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS365G – MAY 1997 – REVISED SEPTEMBER 2002 SN54AHC132 . . . J OR W PACKAGE SN74AHC132 . . . D, DB, DGV, N, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC


    Original     		PDF SN54AHC132, SN74AHC132 SCLS365G SN54AHC132 HA132 A115-A C101 SN54AHC132 SN74AHC132

    Untitled

    Abstract: No abstract text available
    Text: SN54AHC132, SN74AHC132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS365G – MAY 1997 – REVISED SEPTEMBER 2002 SN54AHC132 . . . J OR W PACKAGE SN74AHC132 . . . D, DB, DGV, N, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC


    Original     		PDF SN54AHC132, SN74AHC132 SCLS365G AHC00 000-V A114-A) A115-A) SN54AHC132 AHC132

    74LVC2G32

    Abstract: 74LVC2G32DC 74LVC2G32DP 74LVC2G32GM 74LVC2G32GT JESD22-A114E MO-187
    Text: 74LVC2G32 Dual 2-input OR gate Rev. 07 — 6 June 2008 Product data sheet 1. General description The 74LVC2G32 provides a 2-input OR gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G32 74LVC2G32 74LVC2G32DC 74LVC2G32DP 74LVC2G32GM 74LVC2G32GT JESD22-A114E MO-187

    variable dutycycle square wave generator circuit

    Abstract: DC socket switching 2.1 mm stats QFN-24 8051 Family with internal ADC philips 8051 i2c HDMIULC6-4F3 C8051F312-GQ 512 bytes sram mlp data sheet auto pf power wizard 1.0 module for generator
    Text: C8051F310/1/2/3/4/5/6/7 8/16 kB ISP Flash MCU Family Analog Peripherals - 10-Bit ADC C8051F310/1/2/3/6 only • • • • • - High Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of Up to 200 ksps Up to 21, 17, or 13 external single-ended or differential inputs


    Original     		PDF C8051F310/1/2/3/4/5/6/7 10-Bit C8051F310/1/2/3/6 512-byte variable dutycycle square wave generator circuit DC socket switching 2.1 mm stats QFN-24 8051 Family with internal ADC philips 8051 i2c HDMIULC6-4F3 C8051F312-GQ 512 bytes sram mlp data sheet auto pf power wizard 1.0 module for generator

    SRQ10

    Abstract: No abstract text available
    Text: 74ACT11898 10-BIT PARALLEL-OUT SERIAL SHIFT REGISTER D3644. OCTOBER 1990-R EV ISE D APRIL1993 DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible AND-Gated (Enable/Disable) Serial Inputs Fully Buffered Clock and Serial Inputs 1 2 3 4 5 6 7 qf [ 8


    OCR Scan     		PDF 74ACT11898 10-BIT D3644. 1990-R APRIL1993 500-mA 300-mil SRQ10

    LS164

    Abstract: SN54ALS164 TE 2162
    Text: PRODUCT PREVIEW SN 54A LS164, SN 74 A LS1 64 8-BIT PARALLEL OUT SERIAL SHIFT REGISTERS 0 2 6 6 1 . A P R IL 1 9 8 2 - R E V IS E D M A Y 1 9 8 6 SN54ALS164 . . . J PACKAGE SN74ALS164 . . . D OR N PACKAGE • AND-Gated Enable/Disable Serial inputs • Fully Buffered Clock and Serial Inputs


    OCR Scan     		PDF LS164, 300-m SN54ALS164 SN74ALS164 SN54ALS164 SN74ALS164 LS164 TE 2162

    54164

    Abstract: IC 74164
    Text: SN54164, SN 54LS164, SN74164, S N 74LS164 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS MAR C H 1 9 7 4 - REVISED M AR C H 1988 Gated Serial Inputs S N 5 4 1 6 4 , S N 54 L S 1 6 4 . . . J OR W PACKAGE • Fully Buffered Clock and Serial Inputs S N 7 4 1 6 4 . . . N PACKAGE


    OCR Scan     		PDF SN54164, 54LS164, SN74164, 74LS164 54164 IC 74164

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2 -In p u t OR G ate w ith LSTTL-C om patible Inputs M C54/74HCT32A High-Performance Silicon-Gate CMOS J SUFFIX CERAM IC PACKAGE CASE 6 3 2 -0 8 The MC54/74HCT32A may be used as a level converter for interfacing TTL or NMOS outputs to H igh-S peed CMOS inputs.


    OCR Scan     		PDF MC54/74HCT32A HCT32A C54/74HCT32A

    Untitled

    Abstract: No abstract text available
    Text: SN54HC165, SN74HC16S PARALLEL LOAD 8 BIT SHIFT REGISTERS D 26B 4, DECEMBER 1 9 8 2 -R E V IS E D SEPTEMBER 1987 Complementary Outputs S N 5 4 H C 1 6 6 - . J P AC KA G E SN 74H C 165 D OR N P AC KAG E • Direct Overriding Load Data Inputs • Gated Clock Inputs


    OCR Scan     		PDF SN54HC165, SN74HC16S 300-mil SN54H

    Untitled

    Abstract: No abstract text available
    Text: SN54HCT00, SN74HCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES S C L S 0 6 2 A -NOVEMBER 1988 - REVISED JANUARY 1996 Inputs Are TTL-Voltage Compatible SN54HCT00 . . . J OR W PACKAGE SN 74H CT00. . . D, N, OR PW PACKAGE TOP VIEW Package Options Include Plastic


    OCR Scan     		PDF SN54HCT00, SN74HCT00 300-mil SN54HCT00

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R 74LCX86 Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs General Description Features The LC X 8 6 contains lo u r 2-input exclusive-O R gates. The inputs tolerate voltages up to 7V allow ing the interface ot 5V system s to 3V systems.


    OCR Scan     		PDF 74LCX86

    74L123

    Abstract: 74L122 IC 74122 retriggerable* sn 74122 IC 74LS123 SM4122 SN74L122 SN74123 application note sn54112
    Text: TYPES SN&4I22. SK64123. SN54L122. SN54L123. SN54LS122. SN54LS123, SN74122, SN74t23. SM74L122, SN74L123. SN74LS122, SN74LS123 RETRIGGERABLE MONOSTABLE MULTIVIBRATORS D-C Triggered from Active-High or Active-Low Gated Logic Inputs SN 64122, S N 6 4 LS1 22 . . . J O R W


    OCR Scan     		PDF SK64123. SN54L122. SN54L123. SN54LS122. SN54LS123, SN74122, SN74t23. SM74L122, SN74L123. SN74LS122, 74L123 74L122 IC 74122 retriggerable* sn 74122 IC 74LS123 SM4122 SN74L122 SN74123 application note sn54112