Contextual Info: PANASONIC INDL/ELEK -CIO 72 • - - . . ■ , T È I h13SñS2 GDD7025 □ 1 ~ JH _ _ 693285 2 PANASONIC INOL t E L ECTRONIC 72C LS TTL DN74LSS/U-X 07Q25 B D N 74LSÌ 26A/D N 74LS126AS DN74LS126A/DN74LS126AS Quad Bus Buffer Gates with 3-state Outputs

als240a

Abstract: LS240 244A a244a DV74LS244
Contextual Info: 240, 241, 244 AVG DDiT Semiconductors Technical Data DV74LS240 DV74ALS240A DV74LS241 DV74ALS241A DV74LS244 DV74ALS244A 3-State Octal Buffers/Inverters Line Drivers The DV74LS240, DVALS240A, DV74LS241, DV74ALS241A, DV74LS244 and DV74ALS244A are Octal Buffers and Line Drivers de­

HI-21

Abstract: pn74ls364 7t6d
Contextual Info: PANASONIC 69328f2 IN D L/ELE K PANASONIC -CICÏ 7E » Ë J bTBEflSE IN O L * E L E C T R O N IC 0[][]7a30 □ 7 2 C 0 7 2 30 LS TTL DN74LSS/U-X . DN74LS364/DN74LS364S “ ö ~ 7 - C b5~ DN 74LS364/ DN74LS364S Octal Positive Edge-Triggerd D-Type Flip-Flops with 3 - s ta te Outputs

Contextual Info: DP8303A NATL SEMICOND {MEMORY} IDE D | bSDUBb GDtiSSMM Ö | T-52-31 National Semiconductor DP8303A 8-Bit TRI-STATE Bidirectional Transceiver Inverting General Description Features This family of high speed Schottky 8-bit TRI-STATE bidirec­ tional transceivers are designed to provide bidirectional

ls645

Contextual Info: LS645 O T National Jud Semiconductor DM74LS645 Octal Bus Transceivers General Description Features These octal bus transceivers are designed for asynchro­ nous two-way communication between data buses. The de­ vices transmit data from the A bus to the B bus or from the

Contextual Info: I LS TTL DN74LS Series DN74LS258A DN74LS258A Quad 2 - line to 1-line Data Selectors / Multiplexers with 3-state Outputs • Description DN74LS258A contains four 2-line to 1-line data selector/multi­ plexer circuits with 3-state outputs. P-2 ■ Features

74ls652

Abstract: 74LS654 L8651 74LS653 LS652 SN74LS654 SN54LS651JS
Contextual Info: 8 -Bit Bus Front-Loading-Latch Transceivers SN54/74LS652 SN54/74LS654 SN54/74LS651 SN54/74L.S653 Ordering Information Features/Benefits • Bidirectional bus transceivers and registers • Independent registers tor A and B buses PART NUMBER PKG TEMP POLARITY OUTPUTS POWER

74LS364

Contextual Info: 74LS364 Signetics Flip-Flop Octal D Flip-Flop With 3-State Outputs Product Specification Logic Products FEATURES • 8-bit positive edge-triggered register • 3-State MOS compatible output buffers • Common Clock input with hysteresis • Common 3-State Output Enable

Contextual Info: a s OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS £0 $ DESCRIPTION The T54LS374/T74LS374 is a high-speed, lowpower Octal D-type Flip-Flop featuring separate Dtype inputs for each flip-flop and 3-state outputs for oriented applications. A buffered Clock CP and

Contextual Info: 8-B it Latches, 8-B it Registers w ith Inverting Outputs S N 5 4/7 4L S 5 33 S N 5 4/7 4L S 5 34 S N 5 4 /7 4 S 5 3 3 S N 5 4 /7 4 S 5 3 4 Ordering Information Features/ Benefits • Inverting outputs PART NUMBER • Three-state outputs drive bus lines • 20-pin SKINNYDIP saves space

Contextual Info: Am2948/Am2949 Am2948/Am2949 Octal Three-State Bidirectional Bus Transceivers DISTINCTIVE CHARACTERISTICS 8-bit bidirectional data flow reduces system package count 3-state inputs/outputs for interfacing with bus-oriented systems; PNP inputs reduce input loading

DN74LS364

Abstract: DN74LS364S
Contextual Info: PANASONIC 69 3 2 8 f 2 INDL/ELEK PANAS ON IC -CICÏ 7E » Ë J bTBEflSE 0[][]7a30 □ IN OL * E L E C T R O N IC 72C 07230 LS TTL DN74LSS/U-X . DN74LS364/DN74LS364S “ ö ~ 7 - C b5~ DN 74LS364/ DN74LS364S Octal Positive Edge-Triggerd D-Type Flip-Flops with 3 - s ta te Outputs

74LS210

Abstract: SN74LS210 SN54/74LS210 SN74S210 42A12A 74S210 2y2e
Contextual Info: 8-Bit Buffers SN 54/74LS210 S N 54/74S 210 S N 5 4 /7 4 L S 2 4 0 S N 5 4 /7 4 L S 2 4 1 S N 5 4 /7 4 L S 2 4 4 S N 5 4 /7 4 S 2 4 0 S N 5 4 /7 4 S 2 4 1 S N S 4 /7 4 S 2 4 4 Ordering Information Features/ Benefits • Three-slate outputs drive bus lines PART

Contextual Info: mA MX66U2000 Very Low Power 512k x 8 CMOS SRAM FEATURES □J Very low operation voltage 1.8V QJ Very low power consumption 1OmA Max. write current 1mA (Max.) read current luA (Typ.) CMOS standby current □ High speed access time 150ns (Max.) GJ Input levels are CMOS-compatible

74LS648

Abstract: 74LS647 74LS646 ls646 74LS646 buffer 74LS649 buffer sn74ls649ns 74LS649 SN74LS649 SN74LS647
Contextual Info: 8 -B it Bus Front-Loading-Latch Transceivers SN54/74LS646 SN54/74LS648 SN54/74LS647 SN54/74LS649 O rdering Inform ation F e atu res /B e n efits • Bidirectional bus transceivers and registers PART NUMBER • Independent registers for A and B buses • Real-time data transfer or stored data transfer

74LS243N

Abstract: LS242 LS243 74LS243 54LS242 54LS243 74LS242
Contextual Info: DM54LS242/DM74LS242, DM54LS243/DM74LS243 ££] National ÆÎA Semiconductor DM54LS242/DM74LS242, DM54LS243/DM74LS243 Quadruple Bus Transceivers General Description Absolute Maximum Ratings Note i> T h e s e fo u r d a ta lin e tra n s c e iv e r s a re d e s ig n e d fo r a s y n ­

Contextual Info: AVG Semiconductors_ DDi Technical Data 4-Bit D-Type Register with 3-State Outputs This device is a high-speed 4-Bit Register featuring 3-state outputs for use in bus-organized systems. The clock is fully edge-triggered allowing either a load from the D inputs or a hold depending on the

74ls646

Abstract: 74LS647 74LS649 74LS648 L5648 SN74LS649 SN74LS647
Contextual Info: 8-B it Bus Front-Loading-Latch Transceivers SN54/74LS646 SN54/74LS648 Features/B enefits • Bidirectional bus transceivers and i • Independent registers tor A and B buses • Real-time data transfer or stored data transfer • 24-pin SKINNYDIP saves space

ic ttl 74ls

Abstract: ELE Panasonic
Contextual Info: PANASONIC IN DL /E L E K - C I O 75 6932852 i> Ë J~ ~ b PANASONIC I NDL t E LECTRON I C. ‘i 3 2 û S E O G O b^ O T _7 2 C 0 6 9 2 0 ‘ P r H r LS T T L DN 74LS:>U — X _ d n 74LS16- i / d n 74LS16- i s D N 7 4 L S 1 6 - 1 D N 7 4 L S 1 6 - 1 S

DP7308

Abstract: DP8308 DP8308N b50112f
Contextual Info: DP8308 S3 National Semiconductor DP8308 8-Bit TRI-STATE Bidirectional Transceiver Non-inverting General Description Features The DP8308 is a high speed Schottky 8-bit TRI-STATE bidi­ rectional transceiver designed to provide bidirectional drive for bus oriented microprocessor and digital communications