NS16C450N

Contextual Info: TL16C450 ASYNCHRONOUS COMMUNICATIONS ELEM ENT 0 3 0 9 6 , M A R C H 1 9 8 8 - R E V IS E O A P R IL 1 9 8 9 N DUAL-IN-LINE PACKAGE • Programmable Baud Rate Generator Allows Division of Any Input Reference Clock by 1 to 216 - 1 and Generates an Internal 16 X

75113

Contextual Info: • T -7S-4S-07 SN55113, SN75113 DUAL DIFFERENTIAL LINE DRIVERS 6=^1724 □0A223ci 7 « T i m TEXAS INSTR L IN /I N T F C * D 1 3 1 5 , SEPTEMBER 1 9 7 3 -R E V IS E O SEPTEM8ER 1 9 8 6 Choice of Open-Collector, Open-Emitter, or 3-State Outputs SN55113 . . . J PACKAGE

CHN 752 diode

Abstract: diode LN 4148 TLC 2740
Contextual Info: TLC27M4, TLC27M4A, TLC27M4B, TLC27M9 LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS D 3 1 4 3 , OCTOBER 1 9 8 7 -R E V IS E D OCTOBER 1 99 0 D. J. OR N PACKAGE T rim m e d O ffs e t V o lta g e : TOP VIEW T L C 2 7 M 9 . . . 9 0 0 /*V M a x a t 2 5 °C ,

54HC574

Abstract: SN74HCS74 SN74HCs7 SN54HC674 SN74HC674
Contextual Info: SN54HC574, SN74HC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS _ SCLS14BA - DECEMBER 1982 - REVISED JANUARY 1996 • High-Current 3-State Noninverting Outputs Drive Bus Lines Directly or up to 15 LSTTL Loads SN54HC574. . . J OR W PACKAGE

48TT

Abstract: HC365 SN54HC365 SN74HC365
Contextual Info: SN54HC365, SN74HC365 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS308A - JANUARY 1996 - REVISED JULY 1996 • High-Current 3-State Outputs Drive Bus Lines, Buffer Memory Address Registers, or Drive up to 15 LSTTL Loads • • True Outputs Package Options Include Plastic

D2325

Abstract: SN75159 RS-422-A SN75158
Contextual Info: SN75159 DUAL DIFFERENTIAL LINE DRIVER WITH 3-STATE OUTPUTS SLLS088A - D2325, JANUARY 1977 - REVISED FEBRUARY 1993 Meets EIA Standard RS-422-A Single 5-V Supply D O R N PACKAGE TOP VIEW Balanced Line Operation TTL Compatible NC[ 1 u 14 ] v c c 13 ] 2 Z 1Z[ 2

Contextual Info: 54ACT11534,74ACT11534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCASQ38A- D2957, JULY 1987 - REVISED APRIL 1883_ logic diagram positive logic logic symbolt 24 55 rs 13 >C 1 CLK n 1D r i 2 2D _ _ 1Q 1Q 1D •V 20 3 4

74BCT125

Abstract: BCT125
Contextual Info: TEXAS INSTR IflE D fiTblTaa ODfillOl 3 • SN54BCT125, SN54BCT126 SN74BCT125, SN74BCT126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS LOGIC ■ D 3 1 3 3 , SEPETEMBER 1 9 8 8 -R E V IS E D SEPTEMBER 1 9 8 9 State of the Art BiCMOS Design Significantly Reduces ICCZ

3101B

Contextual Info: SN54CBTD3384, SN74CBTD3384 10-BIT FET BUS SWITCHES WITH LEVEL SHIFTING SCDS025I-M AY 1995 - REVISED MARCH 1998 5-Q Switch Connection Between Two Ports TTL-Compatible Input Levels Designed to Be Used in Level-Shifting Applications Package Options Include Plastic

TIL914

Abstract: 8 channel optocouplers B33B TIL914B TL914 TIL913 TIL914A
Contextual Info: TEXAS INSTR OPTO aUlTab 3SE D QQ7h33S 1 TXIb TIL913, TIL913A, TIL913B DUAL CHANNEL TIL914, TIL914A, TIL914B QUAD CHANNEL OPTOCOUPLERS/OPTOISOLATORS D3438, MAY 1990 • Choice of Two or Four Channels * Gallium-Arsenide Diode Infrared Source * Source Is Optically Coupled to Silicon

SN74HC08M

Contextual Info: SN54HC08, SN74HC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES S C L S 0 8 1 A - D E C E M B E R 1982 - R E V IS E D JA N U A R Y 1986 • SN54HC08. J O R W PACKAGE SN74HC08. D, N, OR PW PACKAGE TOP VIEW Package Options Include Plastic Small-Outllne (D), Thin Shrink

tl598c

Contextual Info: TL598C, TL598Q, TL598M, TL598Y PULSE-WIDTH-MODULATION CONTROL CIRCUITS SLVS053B - FEBRUARY 1988 - REVISED OCTOBER 1995 Complete PWM Power Control Function Totem-Pole Outputs for 200-mA Sink or Source Current Output Control Selects Parallel or Push-Pull Operation

Contextual Info: TLC1078 LinCMOS fJiPOWER PRECISION DUAL OPERATIONAL AMPLIFIER D3146, AUGUST 1988-REVISED JANUARY 1991 • Power Dissipation as Low as 10 pW Typ per Amplifier D, JG, OR P PACKAGE TOP VIEW • Operates on a Single Silver-Oxide Watch Battery, Vd d = 1.4 V Min

phl 78

Contextual Info: SN54AHCT74, SN74AHCT74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET _S C L S 2 6 3 B -D E C E M B E R 1 9 9 5 - REVISED JULY 1996 • Inputs Are TTL-Voltage Compatible • EPIC Enhanced-Performance Implanted

1h39

Abstract: itt 2222 SN74ABT3614
Contextual Info: SN74ABT3614 64 x 36 x 2 CLOCKED FIRST-IN, FIRST-OUT MEMORY WITH BUS MATCHING AND BYTE SWAPPING SC B S1 2 6 C -JU N E 1992- R E V IS E D JANUARY 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident TWo Independent 64 x 36 Clocked FIFOs Buffering Data In Opposite Directions

D1071

Abstract: LVTH182646A LVTH18646A SN54LVTH182646A SN54LVTH18646A SN74LVTH182646A SN74LVTH18646A
Contextual Info: SN54LVTH18646A, SN54LVTH182646A, SN74LVTH18646A, SN74LVTH182646A 3.3-V ABT SCAN TEST DEVICES WITH 18-BIT TRANSCEIVERS AND REGISTERS _ S C BS 311B-M AR C H 1994-R E V IS E D JULY 1996 •

SN54LVT16646

Abstract: LVT16646 SN74LVT16646
Contextual Info: SN54LVT16646, SN74LVT16646 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS14 9 A - MAY 1992 - REVISED MARCH 1994 • State-of-the-Art Advanced BiCMOS Technology ABT Design for 3.3-V Operation and Low-Static Power Dissipation • Members of the Texas Instruments

Contextual Info: TL601, TL604, TL607, TL610 P-MOS ANALOG SWITCHES D 2161, JUNE 1 976—REVISED OCTOBER 1986 • • Switch ± 10-V Analog Signals I • TTL Logic Capability I • 5- to 30-V Supply Ranges | • Low 100 0 On-State Resistance • High (1011 Q) Off-State Resistance

Contextual Info: 54AC11034,74AC11034 HEX NONINVERTERS D2957, FEBRUARY 1988 - REVISED APRIL 1993 ' Flow-Through Architecture Optimizes PCB Layout * Center-PIn V^c and GND Configurations Minimize High-Speed Switching Noise * EPIC Enhanced-Performance Implanted CMOS 1-(im Process

SN74AS304

Abstract: Q3-04
Contextual Info: SN74AS304 OCTAL DIVIDE-BY-2 CIRCUITS/CLOCK DRIVERS 0 3 5 5 5 , JULY 1990 D OR N PACKAGE crop v ie w Maximum Output Skew of 1 ns Maximum Pulse Skew of 1 ns Q3[ Q4[ GND[ GND[ GND[ Center-Pin V qc and GND Configurations to Minimize High-Speed Switching Noise

TLV56211

Contextual Info: TLV5621I LOW-POWER QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTER ^ _ SLAS138B - APRIL 1996 - REVISED FEBRUARY 1997 • • 2.7-V to 5.5-V Single-Supply Operation Four 8-Bit Voltage Output DACs • • Low Power Consumption Half-Buffered Output

29LF040

Abstract: 29VF040
Contextual Info: TMS29LF040, TMS29VF040 524288 BY 8-BIT FLASH MEMORIES SMJS825C - SEPTEMBER 1995 - REVISED NOVEMBER 1997 Single Power Supply 3.3 V ± 0.3 V - ’29LF040 2.7 V to 3.6 V - ’29VF040 5 V ± 10% - See ’29F040 Data sheet Literature Number SMJS820 FM PACKAGE

Contextual Info: 74ACT11258 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS _ S C A S 0 5 6 A - D3278, JANUARY 1989 - RE V IS E D APRIL 1993 Inputs Are TTL-Voltage Compatible 3-State Outputs Interface Directly With

Contextual Info: SN75124 TRIPLE LINE RECEIVER SLLS058B - SEPTEMBER 1973 - REVISED MAY 1995 • Meets or Exceeds the Requirements of IBM System 360 Input/Output Interface Specification D OR N PACKAGE TOP VIEW 1A [ 1 U 1B [ 2 • Operates From Single 5-V Supply • TTL Compatible