Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    74 XOR GATE Search Results

    74 XOR GATE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MC1230F Rochester Electronics LLC XOR Gate, ECL, CDFP14 Visit Rochester Electronics LLC Buy
    MC1230L Rochester Electronics LLC MC1230 - XOR Gate, ECL Visit Rochester Electronics LLC Buy
    PAL20L10-25MJT/BV Rochester Electronics PAL20L10 - XOR Registered 24-Pin TTL Programmable Array Logic Visit Rochester Electronics Buy
    MM54C86J Rochester Electronics LLC 54C86 - XOR Gate, TTL/H/L Series, 4-Func, 2-Input, CMOS, CDIP14 Visit Rochester Electronics LLC Buy
    74F86DC Rochester Electronics LLC XOR Gate, F/FAST Series, 4-Func, 2-Input, TTL, CDIP14, CERAMIC, DIP-14 Visit Rochester Electronics LLC Buy

    74 XOR GATE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    2096VE

    Abstract: 2192VE
    Text: ispLSI 2096VE 3.3V In-System Programmable SuperFAST High Density PLD Functional Block Diagram • SuperFAST HIGH DENSITY PROGRAMMABLE LOGIC — 4000 PLD Gates — 96 I/O Pins, Six Dedicated Inputs — 96 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original     		PDF 2096VE 2192VE 0212/2096VE 2096VE-250 2096VE 2096VE-250LT128 128-Pin 2096VE-200LT128* 2096VE-135LT128 2192VE

    1048E

    Abstract: 1048E-50 0127A 1048C
    Text: ispLSI 1048E In-System Programmable High Density PLD Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 8,000 PLD Gates — 96 I/O Pins, Twelve Dedicated Inputs — 288 Registers — High-Speed Global Interconnects — Wide Input Gating for Fast Counters, State


    Original     		PDF 1048E 1048C 1048E-100LQ 1048E-100LT 128-Pin 1048E-90LQ* 1048E-90LT* 1048E 1048E-50 0127A 1048C

    1048E

    Abstract: 1048C 0124-48C 1048E-125
    Text: ispLSI 1048E High-Density Programmable Logic Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 8,000 PLD Gates — 96 I/O Pins, Twelve Dedicated Inputs — 288 Registers — High-Speed Global Interconnects — Wide Input Gating for Fast Counters, State


    Original     		PDF 1048E 1048C 125QFP 128-Pin 1048E-90LQ* 1048E-90LT* 1048E-70LQ 1048E-70LT 1048E 1048C 0124-48C 1048E-125

    1048e

    Abstract: 1048C
    Text: ispLSI 1048E In-System Programmable High Density PLD Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 8,000 PLD Gates — 96 I/O Pins, Twelve Dedicated Inputs — 288 Registers — High-Speed Global Interconnects — Wide Input Gating for Fast Counters, State


    Original     		PDF 1048E 1048C 1048E-100LQ 1048E-100LT 128-Pin 1048E-90LQ* 1048E-90LT* 1048e 1048C

    ISPLSI 2096VE-135LTN128I

    Abstract: 2096VE-100LT 2096VE 2192VE
    Text: LeadFree a P ckage Options Available! 3.3V In-System Programmable SuperFAST High Density PLD Functional Block Diagram • SuperFAST HIGH DENSITY PROGRAMMABLE LOGIC — 4000 PLD Gates — 96 I/O Pins, Six Dedicated Inputs — 96 Registers — High Speed Global Interconnect


    Original     		PDF 2192VE 2096VE-100LT128 128-Pin 041A/2096VE 2096VE-250 2096VE-135LT128I 2-0041B/2096VE 2096VE-250LTN128 ISPLSI 2096VE-135LTN128I 2096VE-100LT 2096VE 2192VE

    1048C

    Abstract: 1048E
    Text: ispLSI 1048E High-Density Programmable Logic Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 8,000 PLD Gates — 96 I/O Pins, Twelve Dedicated Inputs — 288 Registers — High-Speed Global Interconnects — Wide Input Gating for Fast Counters, State


    Original     		PDF 1048E 1048C 128-Pin 1048E-90LQ* 1048E-90LT* 1048E-70LQ 1048E-70LT 1048E-50LQ* 1048C 1048E

    2096VE100LT128

    Abstract: 2096VE 2192VE
    Text: ispLSI 2096VE 3.3V In-System Programmable SuperFAST High Density PLD Functional Block Diagram • SuperFAST HIGH DENSITY PROGRAMMABLE LOGIC — 4000 PLD Gates — 96 I/O Pins, Six Dedicated Inputs — 96 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original     		PDF 2096VE 2192VE 0212/2096VE 2096VE-250 2096VE 2096VE-250LT128 128-Pin 2096VE-200LT128* 2096VE-135LT128 2096VE100LT128 2192VE

    1048e

    Abstract: 1048C
    Text: ispLSI 1048E In-System Programmable High Density PLD Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 8,000 PLD Gates — 96 I/O Pins, Twelve Dedicated Inputs — 288 Registers — High-Speed Global Interconnects — Wide Input Gating for Fast Counters, State


    Original     		PDF 1048E 1048C 1048E-90LQ 1048E-90LT 1048E-70LQ 1048E-70LT 1048E-50LQ 128-Pin 1048e 1048C

    1048E

    Abstract: ispLSI 1048E-70LT 1048C 1048E-100LQN
    Text: LeadFree Package Options Available! ispLSI 1048E In-System Programmable High Density PLD Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 8,000 PLD Gates — 96 I/O Pins, Twelve Dedicated Inputs Output Routing Pool Output Routing Pool F7 F6 F5 F4 F3 F2 F1 F0


    Original     		PDF 1048E 1048C 1048E-125LTN 1048E-100LQN 1048E-100LTN 128-Pin 1048E ispLSI 1048E-70LT 1048C 1048E-100LQN

    1032E

    Abstract: No abstract text available
    Text: ispLSI 1032E In-System Programmable High Density PLD Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs — 192 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original     		PDF 1032E 1032E-125LT 100-Pin 1032E-100LJ 84-Pin 1032E-100LT 1032E-90LJ* 1032E-90LT* 1032E

    1032E

    Abstract: No abstract text available
    Text: LeadFree Package Options Available! ispLSI 1032E In-System Programmable High Density PLD Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 6000 PLD Gates Output Routing Pool — 64 I/O Pins, Eight Dedicated Inputs D7 D6 D5 D4 D3 D2 D1 D0


    Original     		PDF 1032E 84-Pin 100-Pin 84-PLCC 1032E-70LJNI 1032E-70LTNI 1032E

    1032E

    Abstract: No abstract text available
    Text: ispLSI 1032E In-System Programmable High Density PLD Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs — 192 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original     		PDF 1032E 1032E-125LT 100-Pin 1032E-100LJ 84-Pin 1032E-100LT 1032E-90LJ* 1032E-90LT* 1032E

    1032E

    Abstract: No abstract text available
    Text: ispLSI and pLSI 1032E ® High-Density Programmable Logic Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs — 192 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original     		PDF 1032E 1032E-100LJ 84-Pin 1032E-90LJ* 1032E-80LJ* 1032E-70LJ 1032E

    1032E

    Abstract: IN5384 EWD18
    Text: ispLSI 1032E In-System Programmable High Density PLD Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs — 192 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original     		PDF 1032E 1032E-80LJ 84-Pin 1032E-80LT 100-Pin 1032E-70LJ 1032E-70LT 041A/1032E 1032E IN5384 EWD18

    128-PIN

    Abstract: D 2096
    Text: ispLSI 2096/A In-System Programmable High Density PLD Features Functional Block Diagram • ENHANCEMENTS Output Routing Pool ORP Output Routing Pool (ORP) C7 • HIGH DENSITY PROGRAMMABLE LOGIC — — — — — 4000 PLD Gates 96 I/O Pins, Six Dedicated Inputs


    Original     		PDF 2096/A 096A-80LQ128 128-Pin 096A-80LT128 2096-125LQ 2096-125LT 2096-100LQ D 2096

    2192VE

    Abstract: 2192VE-135LB144 1NCS R1 2096VE
    Text: ispLSI 2192VE 3.3V In-System Programmable SuperFAST High Density PLD Functional Block Diagram — — — — — 8000 PLD Gates 96 I/O Pins, Nine or Twelve Dedicated Inputs 192 Registers High Speed Global Interconnect Wide Input Gating for Fast Counters, State


    Original     		PDF 2192VE 2096VE 2192VE 128-Pin 144-Ball 0212B/2192VE 2192VE-180LT128 2192VE-180LB144 2192VE-135LB144 1NCS R1 2096VE

    2096VE

    Abstract: TQFP 128pin
    Text: ispLSI 2192VL Functional Block Diagram — — — — — 8000 PLD Gates 96 I/O Pins, Nine Dedicated Inputs 192 Registers High Speed Global Interconnect Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic


    Original     		PDF 2192VL 2096VE 0139/2192VL 212A/2192VL 2192VL 2192VL-150LT128 128-Pin 2192VL-150LB144 144-Ball 2192VL-135LT128 2096VE TQFP 128pin

    2096VE

    Abstract: No abstract text available
    Text: ispLSI 2192VL 2.5V In-System Programmable SuperFAST High Density PLD Functional Block Diagram — — — — — 8000 PLD Gates 96 I/O Pins, Nine Dedicated Inputs 192 Registers High Speed Global Interconnect Wide Input Gating for Fast Counters, State


    Original     		PDF 2192VL 2096VE 0139/2192VL 2192VL 128-Pin 144-Ball 212A/2192VL 2192VL-150LT128 2096VE

    2096VE

    Abstract: No abstract text available
    Text: ispLSI 2192VL 2.5V In-System Programmable SuperFAST High Density PLD Functional Block Diagram — — — — — 8000 PLD Gates 96 I/O Pins, Nine Dedicated Inputs 192 Registers High Speed Global Interconnect Wide Input Gating for Fast Counters, State


    Original     		PDF 2192VL 2096VE 0139/2192VL 2192VL 128-Pin 144-Ball 212A/2192VL 2192VL-150LT128 2096VE

    2096VE

    Abstract: 1NCS R1
    Text: ispLSI 2192VL 2.5V In-System Programmable SuperFAST High Density PLD Functional Block Diagram — — — — — 8000 PLD Gates 96 I/O Pins, Nine Dedicated Inputs 192 Registers High Speed Global Interconnect Wide Input Gating for Fast Counters, State


    Original     		PDF 2192VL 2096VE 0139/2192VL 2192VL 128-Pin 144-Ball 212A/2192VL 2192VL-150LT128 2096VE 1NCS R1

    2096VE

    Abstract: 2096VL
    Text: ispLSI 2096VL 2.5V In-System Programmable SuperFAST High Density PLD Functional Block Diagram • SuperFAST HIGH DENSITY PROGRAMMABLE LOGIC — 4000 PLD Gates — 96 I/O Pins, Six Dedicated Inputs — 96 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original     		PDF 2096VL 2096VE 2096VL 128-Pin 0212/2096VL 2096VL-165LT128 2096VL-135LT128

    74 XOR GATE

    Abstract: IC of XOR GATE
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA P ro d u c t P review M C 74LC X 86 L o w -V o lta g e CMOS Quad 2 -In p u t XOR G a te W ith 5 V -T o le ra n t Inputs The M C 74 L C X 86 is a high perfo rm a n ce , q uad 2 -in p u t XO R gate o pe ra tin g from a 2.7 to 3.6V supply. H igh im pe d a nce T T L c o m pa tib le


    OCR Scan     		PDF 51A--03 74 XOR GATE IC of XOR GATE

    Untitled

    Abstract: No abstract text available
    Text: Larg e 2 0 A rith m e tic S eries 16X 4, 16A 4 Large 20 Arithmetic Series OUTPUTS PRODUCT TERMS ARRAY INPUTS PAL16X4 PAL16A4 COMBINATORIAL REGISTERED 4 4 4 4 16 16 Description The PAL16X4 and PAL16A4 have arithmetic gated feedback. These are specialized devices for arithmetic applications.


    OCR Scan     		PDF PAL16X4 PAL16A4 PAL16X4 PAL16A4 I2I314IS 242S2S2J

    Untitled

    Abstract: No abstract text available
    Text: Latti C6 ' Semiconductor ¡Corporation ispLSI 1032E _ In-System Programmable High Density PLD Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs — 192 Registers — High Speed Global Interconnect


    OCR Scan     		PDF 1032E -125U 1032E-125LT 1032E-100LJ 1032E-100LT 1032E-90LJ* 1032E-90LT* 1032E-80LJ* 1032E-80LT*