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    74AC11280 Price and Stock

    Texas Instruments 74AC11280N

    PARITY GENERATOR/CHECKER, 14 Pin, Plastic, DIP
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    Quest Components 74AC11280N 30
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    • 10 $1.334
    • 100 $1.16
    • 1000 $1.16
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    Texas Instruments 74AC11280D

    INSTOCK
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    Chip 1 Exchange 74AC11280D 1,000
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    74AC11280 Datasheets (6)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AC11280 Texas Instruments 9-BIT PARITY GENERATOR/CHECKER Original PDF
    74AC11280D Texas Instruments Logic Ics, Generator/Checker, CMOS, 9-input, 3.3V|5V, Tpd =13.9nSec Original PDF
    74AC11280D Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74AC11280DR Texas Instruments Original PDF
    74AC11280N Texas Instruments Logic Ics, Generator/Checker, CMOS, 9-input, 3.3V|5V, Tpd =13.9nSec Original PDF
    74AC11280N Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF

    74AC11280 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74AC11280 9-BIT PARITY GENERATOR/CHECKER SCAS055A – D3201, APRIL 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Flow-Through Architecture to Optimize


    Original     		PDF 74AC11280 SCAS055A D3201, 500-mA 300-mil

    74AC11280

    Abstract: L-13
    Text: 74AC11280 9ĆBIT PARITY GENERATOR/CHECKER ą ą SCAS055A − D3201, APRIL 1989 − REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Flow-Through Architecture to Optimize


    Original     		PDF 74AC11280 SCAS055A D3201, 500-mA 300-mil 74AC11280 L-13

    74AC11280

    Abstract: No abstract text available
    Text: 74AC11280 9-BIT PARITY GENERATOR/CHECKER SCAS055A – D3201, APRIL 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Flow-Through Architecture to Optimize


    Original     		PDF 74AC11280 SCAS055A D3201, 500-mA 300-mil 74AC11280

    74AC11280

    Abstract: No abstract text available
    Text: 74AC11280 9-BIT PARITY GENERATOR/CHECKER SCAS055A – D3201, APRIL 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Flow-Through Architecture to Optimize


    Original     		PDF 74AC11280 SCAS055A D3201, 500-mA 300-mil 74AC11280

    PHL 99

    Abstract: No abstract text available
    Text: 74AC11280 9-BIT PARITY GENERATOR/CHECKER _ SCAS055A - D3201, APRIL 1989 - REVISED APRIL 1993 D OR N PACKAGE TOP VIEW * Generates Either Odd or Even Parity for Nine Data Unes * Cascadable for n-BKs Parity B[ A[ £ ODD [ GND [ 2 EVEN [ NC [ ll * Flow-Through Architecture to Optimize


    OCR Scan     		PDF 74AC11280 SCAS055A D3201, 500-mA 300-mil PHL 99

    Untitled

    Abstract: No abstract text available
    Text: 54AC11280, 74AC11280 9-BIT PARITY GENERATORS/CHECKERS T I0 1 17— 0 3 2 0 1 . APRIL 1989— REVISED MARCH 1990 • Generates Either Odd or Even Parity for Nine Data Lines 54AC1120O . J PACKAGE 74AC11280 . . . D OR N PACKAGE TOP VIEW • Cascadable for n-Blts Parity


    OCR Scan     		PDF 54AC11280, 74AC11280 500-mA 54AC1120O 74AC11280 TI0117--D3201, 1989--REVISED

    74AC11280

    Abstract: No abstract text available
    Text: 54AC11280. 74AC11280 9-BIT PARITY GENERATORS/CHECKERS TI0117— D3201, APRIL 1989— REVISED M ARCH 1990 54AC11280 . . . J PACKAGE 74AC11260 . . . D OR N PACKAGE Generates Either Odd or Even Parity for Nine Data Lines TOP VIEW Cascadable for n-Bits Parity


    OCR Scan     		PDF 54AC11280. 74AC11280 TI0117â D3201, 500-mA 300-mil 74AC11280

    Untitled

    Abstract: No abstract text available
    Text: 74AC11280 9-BIT PARITY GENERATOR/CHECKER SCAS055A - D3201. APRIL 1989 - REVISED APRIL 1993 Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Blts Parity Flow-Through Architecture to Optimize PCB Layout Center-PIn Vcc and GND Configurations to


    OCR Scan     		PDF 74AC11280 SCAS055A D3201. 500-mA 300-mll

    Untitled

    Abstract: No abstract text available
    Text: 74AC11280 9-BIT PARITY GENERATOR/CHECKER SCAS055A - D3201, APRIL 1989- REVISED APRIL 1993 Generates Either Odd or Even Parity for Nine Data Lines • Cascadable for n-Bits Parity • Flow-Through Architecture to Optimize PCB Layout D OR N PACKAGE TOP VIEW


    OCR Scan     		PDF 74AC11280 SCAS055A D3201, 500-mA 300-mil

    D314

    Abstract: 54ACT11280 74AC11280 74ACT11280 3CD12
    Text: 54ACT11280, 74ACT11280 9-BIT PARITY GENERATORS/CHECKERS TI011B— D 3148, AUG UST 1988— REVISED MARCH 1990 54ACT11280 I PACKAGE 74ACT11280 . . . D OR N PACKAGE • Inputs are TTL-Voltage Compatible Generates Either Odd or Even Parity for Nine Data Lines


    OCR Scan     		PDF 54ACT11280, 74ACT11280 TI011Bâ D3148, 500-mA 300-mil D314 54ACT11280 74AC11280 74ACT11280 3CD12

    T1128

    Abstract: No abstract text available
    Text: S ignetics 74 A C /A C T 11280 9-Bit Odd/Even Parity Generator/Checker Product Specification ACL Products FEATURES • Word length easily expanded by cascading • Output capability: ±24mA • CMOS AC and TTL (ACT) voltage level Inputs • 50ft incident wave switching


    OCR Scan     		PDF 74AC/ACT11280 74AC/ACT11280 10MHz T1128