SN74AUC2G126DCTR
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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PDF
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SN74AUC2G126
SCES533C
000-V
A114-A)
A115-A)
SN74AUC2G126DCTR
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G126
SCES533C
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G126
SCES533C
000-V
A114-A)
A115-A)
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SN74AUC2G126DCTR
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages
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Original
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PDF
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SN74AUC2G126
SCES533A
000-V
A114-A)
A115-A)
SN74AUC2G126DCTR
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A115-A
Abstract: C101 SN74AUC2G126 SN74AUC2G126DCTR
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G126
SCES533C
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G126
SN74AUC2G126DCTR
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G126
SCES533C
000-V
A114-A)
A115-A)
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages
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Original
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PDF
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SN74AUC2G126
SCES533A
000-V
A114-A)
A115-A)
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Untitled
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G126
SCES533C
000-V
A114-A)
A115-A)
|
SN74AUC2G126DCTR
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G126
SCES533C
000-V
A114-A)
A115-A)
SN74AUC2G126DCTR
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SN74AUC2G126DCTR
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533B – DECEMBER 2003 – REVISED SEPTEMBER 2006 FEATURES • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC2G126
SCES533B
000-V
A114-A)
A115-A)
SN74AUC2G126DCTR
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A115-A
Abstract: C101 SN74AUC2G126 74AUC SN74AUC2G126DCTR
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G126
SCES533C
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G126
74AUC
SN74AUC2G126DCTR
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A115-A
Abstract: C101 SN74AUC2G126 SN74AUC2G126DCTR
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages
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Original
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PDF
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SN74AUC2G126
SCES533A
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G126
SN74AUC2G126DCTR
|
SN74AUC2G126DCTR
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533B – DECEMBER 2003 – REVISED SEPTEMBER 2006 FEATURES • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Optimized for 1.8-V Operation and Is 3.6-V I/O
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Original
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PDF
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SN74AUC2G126
SCES533B
000-V
A114-A)
A115-A)
SN74AUC2G126DCTR
|
SN74AUC2G126DCTR
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G126
SCES533C
000-V
A114-A)
A115-A)
SN74AUC2G126DCTR
|
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SN74AUC2G126DCTR
Abstract: No abstract text available
Text: SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES533C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
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Original
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PDF
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SN74AUC2G126
SCES533C
000-V
A114-A)
A115-A)
SN74AUC2G126DCTR
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