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    74AUP2G240GT Search Results

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    74AUP2G240GT Price and Stock

    Rochester Electronics LLC 74AUP2G240GT,115

    IC BUFFER INVERT 3.6V 8XSON
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    DigiKey 74AUP2G240GT,115 Bulk 85,000 1,080
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    74AUP2G240GT,115 Bulk 39,800 1,080
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    Nexperia 74AUP2G240GT,115

    IC BUFFER INVERT 3.6V 8XSON
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    DigiKey 74AUP2G240GT,115 Reel 5,000 5,000
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    74AUP2G240GT,115 Digi-Reel 5,000 1
    • 1 $0.69
    • 10 $0.49
    • 100 $0.3847
    • 1000 $0.32946
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    74AUP2G240GT,115 Cut Tape 5,000 1
    • 1 $0.69
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    Avnet Americas 74AUP2G240GT,115 Reel 6 Weeks 5,000
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    Mouser Electronics 74AUP2G240GT,115
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    Rochester Electronics 74AUP2G240GT,115 85,000 1
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    • 1000 $0.2383
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    TTI 74AUP2G240GT,115 Reel 5,000
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    Avnet Silica 74AUP2G240GT,115 8 Weeks 5,000
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    NXP Semiconductors 74AUP2G240GT,115

    74AUP2G240GT - Bus Driver, AUP/ULP/V Series, 2-Func, 1-Bit, Inverted Output, SON-8
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Rochester Electronics 74AUP2G240GT,115 39,800 1
    • 1 $0.2804
    • 10 $0.2804
    • 100 $0.2636
    • 1000 $0.2383
    • 10000 $0.2383
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    74AUP2G240GT Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP2G240GT NXP Semiconductors Low-power dual inverting buffer/line driver; 3-state Original PDF
    74AUP2G240GT NXP Semiconductors 74AUP2G240 - IC AUP/ULP/V SERIES, DUAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT883-1, SON-8, Bus Driver/Transceiver Original PDF
    74AUP2G240GT,115 NXP Semiconductors Low-power dual inverting buffer/line driver; 3-state; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" Original PDF
    74AUP2G240GT,115 NXP Semiconductors 74AUP2G240 - IC AUP/ULP/V SERIES, DUAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT883-1, SON-8, Bus Driver/Transceiver Original PDF

    74AUP2G240GT Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74AUP2G240

    Abstract: 74AUP2G240DC 74AUP2G240GT JESD22-A114E JESD78
    Text: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 03 — 7 April 2009 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE


    Original     		PDF 74AUP2G240 74AUP2G240 74AUP2G240DC 74AUP2G240GT JESD22-A114E JESD78

    74AUP2G240

    Abstract: 74AUP2G240DC 74AUP2G240GT JESD22-A114E JESD78
    Text: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 04 — 30 June 2009 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE


    Original     		PDF 74AUP2G240 74AUP2G240 74AUP2G240DC 74AUP2G240GT JESD22-A114E JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 01 — 6 October 2006 Product data sheet 1. General description The 74AUP2G240 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74AUP2G240 74AUP2G240 The18

    74AUP2G240

    Abstract: 74AUP2G240DC 74AUP2G240GT JESD78
    Text: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 5 — 13 September 2010 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE


    Original     		PDF 74AUP2G240 74AUP2G240 74AUP2G240DC 74AUP2G240GT JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 8 — 24 January 2013 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE


    Original     		PDF 74AUP2G240 74AUP2G240

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 7 — 6 June 2012 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE


    Original     		PDF 74AUP2G240 74AUP2G240

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 6 — 5 December 2011 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE


    Original     		PDF 74AUP2G240 74AUP2G240

    74AUP2G240

    Abstract: 74AUP2G240DC 74AUP2G240GM 74AUP2G240GT JESD22-A114D JESD78
    Text: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 02 — 22 February 2008 Product data sheet 1. General description The 74AUP2G240 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS-compatible TTL families.


    Original     		PDF 74AUP2G240 74AUP2G240 74AUP2G240DC 74AUP2G240GM 74AUP2G240GT JESD22-A114D JESD78

    NC7WZ240K8X

    Abstract: 74AUP2G240 74LVC2G240 NC7WZ240 SN74AUC2G240 SN74AUP2G240 SN74LVC2G240 Silego Technology dual inverting schmitt-trigger
    Text: SLG74LB2G240 GreenLIBTM DUAL INVERTING BUFFER/DRIVER WITH TRI-STATE OUTPUTS General Description Features The GreenLIB provides the dual inverting buffer/driver with • Pb-Free / RoHS Compliant tri-state outputs. The tri-state outputs are controlled by •


    Original     		PDF SLG74LB2G240 000-0074LB2G240-11 NC7WZ240K8X 74AUP2G240 74LVC2G240 NC7WZ240 SN74AUC2G240 SN74AUP2G240 SN74LVC2G240 Silego Technology dual inverting schmitt-trigger

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 7 — 6 June 2012 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE


    Original     		PDF 74AUP2G240 74AUP2G240