74F384 Search Results

74F384 Datasheets (14)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
74F384		Signetics	8-Bit Serial / Parallel Two Complement Multiplier		Original	PDF
74F384DC		National Semiconductor	8-Bit Serial / Parallel Two Complement Multiplier		Original	PDF
74F384DC		Unknown	Historical semiconductor price guide (US$ - 1998). From our catalog scanning project.		Historical	PDF
74F384DCQR		National Semiconductor	4.5 V to 5.5 V, 8-bit serial/parallel two complement multiplier		Scan	PDF
74F384DM		National Semiconductor	8-Bit Serial / Parallel Two Complement Multiplier		Original	PDF
74F384PC		National Semiconductor	8-Bit Serial / Parallel Two Complement Multiplier		Original	PDF
74F384PC		Unknown	Historical semiconductor price guide (US$ - 1998). From our catalog scanning project.		Historical	PDF
74F384PCQR		Unknown	Historical semiconductor price guide (US$ - 1998). From our catalog scanning project.		Historical	PDF
74F384PCQR		National Semiconductor	4.5 V to 5.5 V, 8-bit serial/parallel two complement multiplier		Scan	PDF
74F384PM		National Semiconductor	8-Bit Serial / Parallel Two Complement Multiplier		Original	PDF
74F384SC		National Semiconductor	8-Bit Serial / Parallel Two Complement Multiplier		Original	PDF
74F384SC		Unknown	Historical semiconductor price guide (US$ - 1998). From our catalog scanning project.		Historical	PDF
74F384SCQR		National Semiconductor	4.5 V to 5.5 V, 8-bit serial/parallel two complement multiplier		Scan	PDF
74F384SM		National Semiconductor	8-Bit Serial / Parallel Two Complement Multiplier		Original	PDF

74F384 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
74F322 Abstract: 74F322PC 74F384 MS-001 Text: Revised April 1999 74F322 Octal Serial/Parallel Register with Sign Extend General Description The 74F322 is an 8-bit shift register with provision for either serial or parallel loading and with 3-STATE parallel outputs plus a bi-state serial output. Parallel data inputs and parallel outputs are multiplexed to minimize pin count. State	Original	74F322 74F322 74F322PC 74F384 MS-001	PDF
c5088 transistor Abstract: transistor C3207 TLO84CN sec c5088 IN5355B D2817A C3207 transistor toshiba f630 TLO81CP MC74HC533N Text: Transistor - Diode Cross Reference - H.P. Part Numbers to JEDEC Numbers Part Num. 1820-0225 1820-0240 1820-0352 1820-1804 1821-0001 1821-0002 1821-0006 1850-0062 1850-0064 1850-0075 1850-0076 1850-0093 1850-0099 1850-0126 1850-0137 1850-0150 1850-0151 1850-0154	Original	1853IMPATT c5088 transistor transistor C3207 TLO84CN sec c5088 IN5355B D2817A C3207 transistor toshiba f630 TLO81CP MC74HC533N	PDF
x7 frequency multiplier Abstract: AM25LS14 Text: co co National Semiconductor 54F/74F384 8-Bit Serial/Parallel Twos Complement Multiplier General Description device. An asynchronous Parallel Load PL input clears the internal flip-flops to the start condition and enables the X latches to accept new multiplicand data. The Parallel Load	OCR Scan	54F/74F384 x7 frequency multiplier AM25LS14	PDF
carry save adder Abstract: No abstract text available Text: 384 54F/74F384 Connection Diagrams 8-Bit Serial/Parallel Tw os Complement M ultiplier PL [7 ~nn Description The ’F384 is an 8-bit by 1-bit sequential logic element that m ultiplies two numbers represented in twos complement notation. The device implements Booth’s algorithm internally to produce a twos complement	OCR Scan	54F/74F384 12-Bit carry save adder	PDF
carry save adder Abstract: F384 74F384 N74F384D N74F384N Text: FAST 74F384 Signetics Multiplier 8-Bit Serial/Parallel Two's Complement Multiplier Preliminary Specification FAST Products FEATURES DESCRIPTION The 'F384 is an 8-bit sequential logic element that multiplies two numbers rep resented In Two's Complement notation.	OCR Scan	74F384 500ns carry save adder F384 74F384 N74F384D N74F384N	PDF
74F10 Abstract: F384 AM25LS14 Text: July 1989 54F/74F384 8-Bit Serial/Parallel Twos Complement Multiplier General Description The ’F384 is an 8 -bit by 1-bit sequential logic element that multiplies two numbers represented in twos complement notation. The device implements Booth's algorithm internal	OCR Scan	54F/74F384 devic009) 2-26A AA32096 74F10 F384 AM25LS14	PDF
carry save adder Abstract: 8 shift register by using D flip-flop shift register by using D flip-flop Twos Complement Adder/Subtractor F384 K/1574-X6 Text: 384 54F/74F384 Connection Diagrams 8-Bit Serial/Parallel Twos Com plement M u ltiplier Description The ’ F384 is an 8-bit by 1-bit sequential logic elem ent that m u ltip lie s tw o num bers represented in tw os com plem ent notation. The device im plem ents B oo th’s algorithm in te rna lly to produce a tw os com plem ent	OCR Scan	54F/74F384 12-Bit carry save adder 8 shift register by using D flip-flop shift register by using D flip-flop Twos Complement Adder/Subtractor F384 K/1574-X6	PDF
Untitled Abstract: No abstract text available Text: FAST 74F384 Signetics M ultiplier 8-Bit Serial/Parallel Two's Complement Multiplier Preliminary Specification FAST Products FEATURES DESCRIPTION The 'F384 is an 8-bit sequential logic element that multiplies two numbers rep resented in Two's Complement notation.	OCR Scan	74F384 100MHz 16-Pin 500ns	PDF
carry save adder Abstract: No abstract text available Text: 384 54F/74F384 C onnection Diagrams 8-Bit Serial/Parallel Twos Complement M ultiplier Description The 'F384 is an 8-bit by 1-bit sequential logic element that m ultiplies two numbers represented in twos complement notation. The device implements Booth’s algorithm internally to produce a twos complement	OCR Scan	54F/74F384 12-Bit carry save adder	PDF
carry save adder Abstract: 74F384 F384 N74F384D N74F384N Text: FAST 74F384 Multiplier 8-Bit S e rial/P a ra lle l T w o ’s C o m p lem ent M ultiplier Preliminary Specification FAST Products FEATURES • 8-bit by 1-bit sequential logic element • Multiplies two numbers represented in Two's Complement • Parallel inputs accept and store	OCR Scan	74F384 500ns carry save adder 74F384 F384 N74F384D N74F384N	PDF
74F10 Abstract: F384 EZ 830 Text: National Semiconductor July 1989 54F/74F384 8-Bit Serial/Parallel Twos Complement Multiplier General Description The ’F384 is an 8 -bit by 1-bit sequential logic element that multiplies two numbers represented in twos complement notation. The device implements Booth's algorithm internal	OCR Scan	54F/74F384 the-195 D-8000 2-26A AA32096 74F10 F384 EZ 830	PDF
74F161 PC Abstract: 74F163PC 74f500 74f558 74F164PC 74F548PC 74F138d 74F547PC transistor f630 74F253DC Text: F a ir c h ild A d v a n c e d S c h o t t k y T L $ 3. HANDLING PRECAUTIONS FOR SEMICONDUCTOR COMPONENTS The follow ing handling precautions should be observed for oxide isolation, shallow junction processed parts, such as FAST or 100K ECL: 1. All Fairchild devices are shipped in conducting foam or anti	OCR Scan		PDF
BPW22A Abstract: cm .02m z5u 1kv pin configuration of BFW10 la4347 B2X84 TDA3653 equivalent TRIAC TAG 9322 HEF40106BP equivalent fx4054 core dsq8 Text: Contents Page Page New product index Combined index and status codes viii x Mullard approved components BS9000, CECC, and D3007 lists CV list Integrated circuits Section index xliii 1 5 Standard functions LOGIC FAMILIES CMOS HE4000B family specifications CMOS HE4000B family survey	OCR Scan	BS9000, D3007 HE4000B 80RIBUTION BS9000 BPW22A cm .02m z5u 1kv pin configuration of BFW10 la4347 B2X84 TDA3653 equivalent TRIAC TAG 9322 HEF40106BP equivalent fx4054 core dsq8	PDF
8 bit bcd adder subtractor Abstract: 4 bit serial subtractor bcd subtractor binary 4 bit serial subtractor 4 Bit BCD Subtractor 4-bit bcd subtractor Text: NATIONAL SENICOND {LOGIC} L.S0115S □Dbö3QS û 31E D Function 8-Input : Dual 4-Input Quad 2-Input Quad 2-Input Inverting 8-Input (TRI-STATE) Dual 4-Input (TRI-STATE) . / Quad 2-Input (TRI-STATE) Quad 2-Input (TRI-STATE, Inverting) 4-Input w/Shift (TRI-STATE)	OCR Scan	S0115S 54F/74F151A 54F/74F153 54F/74F157A 54F/74F158A 54F/74F251A 54F/74F253 54F/74F257A 54F/74F258A 54F/74F350 8 bit bcd adder subtractor 4 bit serial subtractor bcd subtractor binary 4 bit serial subtractor 4 Bit BCD Subtractor 4-bit bcd subtractor	PDF