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    74LVC3G17DC Search Results

    74LVC3G17DC Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SN74LVC3G17DCURG4 Texas Instruments TRIPLE SCHMITT-TRIGGER BUFFER 8-VSSOP -40 to 125 Visit Texas Instruments Buy
    SN74LVC3G17DCTRG4 Texas Instruments TRIPLE SCHMITT-TRIGGER BUFFER 8-SM8 -40 to 125 Visit Texas Instruments Buy
    SN74LVC3G17DCUR Texas Instruments TRIPLE SCHMITT-TRIGGER BUFFER 8-VSSOP -40 to 125 Visit Texas Instruments Buy
    SN74LVC3G17DCTRE4 Texas Instruments TRIPLE SCHMITT-TRIGGER BUFFER 8-SM8 -40 to 125 Visit Texas Instruments Buy
    SN74LVC3G17DCTR Texas Instruments TRIPLE SCHMITT-TRIGGER BUFFER 8-SM8 -40 to 125 Visit Texas Instruments Buy
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    74LVC3G17DC Price and Stock

    Texas Instruments SN74LVC3G17DCUR

    IC BUFFER NON-INVERT 5.5V 8VSSOP
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    DigiKey SN74LVC3G17DCUR Digi-Reel 64,806 1
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    Nexperia 74LVC3G17DC,125

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    Texas Instruments SN74LVC3G17DCTRE4

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    Nexperia 74LVC3G17DC-Q100H

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    74LVC3G17DC Datasheets (7)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVC3G17DC NXP Semiconductors Triple non-inverting Schmitt trigger with 5 V tolerant input Original PDF
    74LVC3G17DC Philips Semiconductors Triple non-inverting Schmitt trigger with 5 V tolerant input Original PDF
    74LVC3G17DC Philips Semiconductors OP Amp, Triple non-Inverting Schmitt Trigger with 5 V Tolerant Input, Tape and Reel Original PDF
    74LVC3G17DC,125 NXP Semiconductors 74LVC3G17 - IC LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8, Gate Original PDF
    74LVC3G17DC,125 NXP Semiconductors Triple non-inverting Schmitt trigger with 5 V tolerant input - Description: Triple Schmitt-Trigger Non-Inverting ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: +/- 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 3.6@3.3V ns; Voltage: 1.65 - 5.5; Package: SOT765-1 (VSSOP8); Container: Reel Pack, Reverse, Reverse Original PDF
    74LVC3G17DC-G NXP Semiconductors 74LVC3G17DC - Triple non-inverting Schmitt trigger with 5 V tolerant input - Description: Triple Schmitt-Trigger Non-Inverting ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: +/- 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 3.6@3.3V ns; Voltage: 1.65 - 5.5 Original PDF
    74LVC3G17DC-G NXP Semiconductors Triple non-inverting Schmitt trigger with 5 V tolerant input - Description: Triple Schmitt-Trigger Non-Inverting ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: +/- 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 3.6@3.3V ns; Voltage: 1.65 - 5.5 Original PDF

    74LVC3G17DC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LVC3G17

    Abstract: 74LVC3G17DC 74LVC3G17DP 74LVC3G17GM 74LVC3G17GT JESD22-A114E MO-187
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 05 — 13 March 2008 Product data sheet 1. General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17 74LVC3G17 74LVC3G17DC 74LVC3G17DP 74LVC3G17GM 74LVC3G17GT JESD22-A114E MO-187

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 8 — 21 September 2011 Product data sheet 1. General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17 74LVC3G17

    001aah861

    Abstract: No abstract text available
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 11 — 9 April 2013 Product data sheet 1. General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17 74LVC3G17 001aah861

    74LVC3G17DC NXP

    Abstract: 74LVC3G17DP SOT505-2 V17 marking code 74LVC3G17 74LVC3G17DC 74LVC3G17GM 74LVC3G17GT JESD22-A114E MO-187
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 06 — 6 June 2008 Product data sheet 1. General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17 74LVC3G17 74LVC3G17DC NXP 74LVC3G17DP SOT505-2 V17 marking code 74LVC3G17DC 74LVC3G17GM 74LVC3G17GT JESD22-A114E MO-187

    NC7NZ17K8X

    Abstract: 74LVC3G17 NC7NZ17 SN74AUP3G17 SN74LVC3G17 SLG74LB3G17
    Text: SLG74LB3G17 GreenLIBTM TRIPLE SCHMITT-TRIGGER BUFFER General Description Features The GreenLIB provides the triple schmitt-trigger buffer. • Pb-Free / RoHS Compliant Schmitt-trigger action at all inputs makes the circuit tolerant • Halogen-Free to slower input rise and fall times. This device is fully specified


    Original     		PDF SLG74LB3G17 000-0074LB3G17-11 NC7NZ17K8X 74LVC3G17 NC7NZ17 SN74AUP3G17 SN74LVC3G17 SLG74LB3G17

    74LVC3G17GF

    Abstract: 74LVC3G17 74LVC3G17DC 74LVC3G17DP 74LVC3G17GM 74LVC3G17GT
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 7 — 4 November 2010 Product data sheet 1. General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17 74LVC3G17 74LVC3G17GF 74LVC3G17DC 74LVC3G17DP 74LVC3G17GM 74LVC3G17GT

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 9 — 23 November 2011 Product data sheet 1. General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17 74LVC3G17

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G17-Q100 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 1 — 22 May 2014 Product data sheet 1. General description The 74LVC3G17-Q100 provides three non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17-Q100 74LVC3G17-Q100 74LVC3G17

    SOT833

    Abstract: No abstract text available
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 04 — 21 May 2007 Product data sheet 1. General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17 74LVC3G17 SOT833

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 02 — 3 November 2004 Product data sheet 1. General description The 74LVC3G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74LVC3G17 74LVC3G17

    74LVC3G17

    Abstract: 74LVC3G17DC 74LVC3G17DP MO-187
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 01 — 24 June 2004 Product data sheet 1. General description The 74LVC3G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74LVC3G17 74LVC3G17 74LVC3G17DC 74LVC3G17DP MO-187

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 10 — 6 July 2012 Product data sheet 1. General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17 74LVC3G17

    74LVC3G17

    Abstract: 74LVC3G17DC 74LVC3G17DP 74LVC3G17GT MO-187
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 03 — 31 January 2005 Product data sheet 1. General description The 74LVC3G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74LVC3G17 74LVC3G17 74LVC3G17DC 74LVC3G17DP 74LVC3G17GT MO-187