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    74AC112 Search Results

    74AC112 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74AC11244DW Texas Instruments Octal Buffers/Drivers 24-SOIC -40 to 85 Visit Texas Instruments Buy
    74AC11245DW Texas Instruments Octal Bus Transceivers 24-SOIC -40 to 85 Visit Texas Instruments Buy
    74AC11240DW Texas Instruments Octal Buffers/Drivers 24-SOIC -40 to 85 Visit Texas Instruments Buy
    74AC11257DW Texas Instruments Quadruple 2-Line To 1-Line Data Selectors/Multiplexers With 3-State Outputs 20-SOIC -40 to 85 Visit Texas Instruments
    74AC11244PW Texas Instruments Octal Buffers/Drivers 24-TSSOP -40 to 85 Visit Texas Instruments Buy
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    74AC112 Price and Stock

    Texas Instruments 74AC11244PWR

    IC BUF NON-INVERT 5.5V 24TSSOP
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    DigiKey 74AC11244PWR Cut Tape 2,843 1
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    Mouser Electronics 74AC11244PWR 1,480
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    Chip One Stop 74AC11244PWR Cut Tape 6
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    Texas Instruments 74AC11244DWR

    IC BUFF NON-INVERT 5.5V 24SOIC
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    DigiKey 74AC11244DWR Digi-Reel 1,910 1
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    Mouser Electronics 74AC11244DWR 508
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    Bristol Electronics 74AC11244DWR 1,970
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    74AC11244DWR 442
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    Quest Components 74AC11244DWR 1,576
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    74AC11244DWR 353
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    Rochester Electronics 74AC11244DWR 100,996 1
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    Component Electronics, Inc 74AC11244DWR 318
    • 1 $2.31
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    Texas Instruments 74AC11240PW

    IC BUFF INVERT 5.5V 24TSSOP
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    DigiKey 74AC11240PW Tube 1,165 1
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    Mouser Electronics 74AC11240PW 180
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    Rochester Electronics 74AC11240PW 429 1
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    Texas Instruments CD74AC112M96

    IC FF JK TYPE DUAL 1BIT 16SOIC
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    DigiKey CD74AC112M96 Cut Tape 1,001 1
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    Mouser Electronics CD74AC112M96 569
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    Rochester Electronics CD74AC112M96 23,822 1
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    Texas Instruments CD74AC112E

    IC FF JK TYPE DUAL 1BIT 16DIP
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    DigiKey CD74AC112E Tube 839 1
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    Mouser Electronics CD74AC112E 802
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    TME CD74AC112E 22 1
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    ComSIT USA CD74AC112E 75
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    Find more 74AC112 price and stock on Findchips.com

    74AC112 Datasheets (299)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AC112 Texas Instruments Dual J-K Flip-Flop with Set and Reset Original PDF
    74AC11204DW Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74AC11204DW Texas Instruments HEX INVERTER/CLOCK DRIVER Scan PDF
    74AC11204N Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74AC11204N Texas Instruments HEX INVERTER/CLOCK DRIVER Scan PDF
    74AC11208DW Texas Instruments DUAL 1-LlNE TO 4-LlNE CLOCK DRIVERS WITH 3-STATE OUTPUTS Scan PDF
    74AC11208N Texas Instruments DUAL 1-LlNE TO 4-LlNE CLOCK DRIVERS WITH 3-STATE OUTPUTS Scan PDF
    74AC11238 Texas Instruments 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS Original PDF
    74AC11238 Texas Instruments 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS Original PDF
    74AC11238D Texas Instruments Decoder/Demultiplexer, Single, 3-Input, Non-Inverting, 16-SOP Original PDF
    74AC11238D Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74AC11238DR Texas Instruments 74AC11238 - IC AC SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, PDSO16, PLASTIC, SOP-16, Decoder/Driver Original PDF
    74AC11238FK Texas Instruments Original PDF
    74AC11238N Texas Instruments 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER Original PDF
    74AC11238N Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74AC11239 Texas Instruments DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER Original PDF
    74AC11239 Texas Instruments DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER Original PDF
    74AC11239 Philips Semiconductors Scan PDF
    74AC11239D Texas Instruments Decoder/Demultiplexer, Dual, 2-Input, Non-Inverting, 16-SOP Original PDF
    74AC11239D Texas Instruments Dual 2-Line To 4-Line Decoders/Demultiplexers 16-SOIC -40 to 85 Original PDF
    ...

    74AC112 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AC11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS448A – MAY 1987 – REVISED APRIL 1996 D D D D D DB, DW, OR NT PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise


    Original     		74AC11240 SCAS448A 500-mA 300-mil PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AC11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS010B – JULY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, NT, OR PW PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines Directly Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original     		74AC11245 SCAS010B 500-mA 300-mil PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AC11273 OCTAL DĆTYPE FLIPĆFLOP WITH CLEAR ą SCAS497 − D3442, MARCH 1990 − REVISED APRIL 1993 • • • • • • DW OR NT PACKAGE TOP VIEW Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators Flow-Through Architecture to Optimize


    Original     		74AC11273 SCAS497 D3442, 500-mA 300-mil PDF

    Untitled

    Abstract: No abstract text available
    Text: 54AC11241, 74AC11241 OCTAL BUFFERS/LINE DRIVERS WITH 3ĆSTATE OUTPUTS ą SCAS032A − JULY 1987 − REVISED APRIL 1993 • • • • • • 54AC11241 . . . JT PACKAGE 74AC11241 . . . DB, DW OR NT PACKAGE 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers


    Original     		54AC11241, 74AC11241 SCAS032A 54AC11241 500-mA 300-mil PDF

    CDC204

    Abstract: MS-013
    Text: CDC204 HEX INVERTER/CLOCK DRIVER SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998 D D D D D D D D DW PACKAGE TOP VIEW CDC204 Replaces 74AC11204 Low-Skew Propagation Delay Specifications for Clock-Driver Applications CMOS-Compatible Inputs and Outputs Flow-Through Architecture Optimizes


    Original     		CDC204 SCAS098E CDC204 74AC11204 500-mA MS-013 PDF

    74AC11257

    Abstract: No abstract text available
    Text: 74AC11257 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS SCAS049B – MARCH 1989 – REVISED JUNE 1996 D D D D D D D 3-State Outputs Interface Directly With System Bus Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original     		74AC11257 SCAS049B 500-mA 300-mil 74AC11257 PDF

    74AC11251

    Abstract: No abstract text available
    Text: 74AC11251 1-OF-8 DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS SCAS085A − DECEMBER 1989 − REVISED APRIL 1993 • • • • • D OR N PACKAGE 3-State Outputs Interface Directly with System Bus TOP VIEW Performs Parallel-to-Serial Conversion D0 G Y


    Original     		74AC11251 SCAS085A 500-mA 74AC11251 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AC11244 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCAS171B – MARCH 1987 – REVISED SEPTEMBER 1998 D D D D D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB


    Original     		74AC11244 SCAS171B 500-mA PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AC11280 9-BIT PARITY GENERATOR/CHECKER SCAS055A – D3201, APRIL 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Flow-Through Architecture to Optimize


    Original     		74AC11280 SCAS055A D3201, 500-mA 300-mil PDF

    CDC203

    Abstract: CDC203DW CDC203DWR CDC203DWRG4 MS-013
    Text: CDC203 3.3-V HEX INVERTER/CLOCK DRIVER SCAS324A – OCTOBER 1989 – REVISED NOVEMBER 1995 D D D D D D D D DW PACKAGE TOP VIEW Replaces 74AC11203 Low-Skew Propagation Delay Specifications for Clock Driver Applications Operates at 3.3-V VCC Flow-Through Architecture Optimizes


    Original     		CDC203 SCAS324A 74AC11203 500-mA CDC203 CDC203DW CDC203DWR CDC203DWRG4 MS-013 PDF

    74AC11251

    Abstract: No abstract text available
    Text: 74AC11251 1–OF–8 DATA SELECTOR/MULTIPLEXER WITH 3–STATE OUTPUTS SCAS085A – DECEMBER 1989 – REVISED APRIL 1993 • • • • • • • • D OR N PACKAGE 3-State Outputs Interface Directly with System Bus TOP VIEW Performs Parallel-to-Serial Conversion


    Original     		74AC11251 SCAS085A 500-mA 74AC11251 PDF

    54AC11253

    Abstract: 74AC11253
    Text: 54AC11253, 74AC11253 DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS SCAS041A – MAY 1988 – REVISED APRIL 1993 • • • • • • 54AC11253 . . . J PACKAGE 74AC11253 . . . D OR N PACKAGE TOP VIEW Permits Multiplexing From N Lines to


    Original     		54AC11253, 74AC11253 SCAS041A 54AC11253 300-mil 54AC11253 74AC11253 PDF

    1B19-2-A

    Abstract: 74AC11258
    Text: 74AC11258 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS SCAS063A – D3257, JANUARY 1989 – REVISED APRIL 1993 • • • • • • • 3-State Outputs Interface Directly With System Bus Flow-Through Architecture to Optimize


    Original     		74AC11258 SCAS063A D3257, 500-mA 300-mil 1B19-2-A PDF

    Untitled

    Abstract: No abstract text available
    Text: 54AC11238, 74AC11238 3ĆLINE TO 8ĆLINE DECODERS/DEMULTIPLEXERS ą ą SCAS039A − APRIL 1988 − REVISED APRIL 1993 • • • • • • • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Noninverting Version of ′AC11138


    Original     		54AC11238, 74AC11238 SCAS039A AC11138 500-mA 300-mil 54AC11238 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AC11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS010B – JULY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, NT, OR PW PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines Directly Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original     		74AC11245 SCAS010B 500-mA 300-mil /imaging/BITTING/cpl/20020930 10/TXII/09272002 HTML/74ac11245 Sep-30-2002 74AC11245, 74AC11245NT PDF

    D2957

    Abstract: No abstract text available
    Text: 54AC11241, 74AC11241 OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS I_ • ■ I I I D2957, JULY 1987-R E V IS E D APRIL 1993 * 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers * Flow-Through Architecture Optimizes PCB Layout * Center-Pin Vcc and GND Configurations


    OCR Scan     		500-mA 300-mll AC11240 AC11244, D2957 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AC11204 HEX INVERTER/CLOCK DRIVER D3427, O C TO B ER 1989 DW OR N PACKAGE Low-Skew Propagation Delay Specifications for Clock Driver Applications TOP VIEW 1Y[ 1 2Y [ 2 3Y [ 3 Flow-Through Architecture Optimizes PCB Layout * * * Package Options Include Plastic “Small


    OCR Scan     		74AC11204 D3427, 500-mA 300-mil PDF

    19ba

    Abstract: No abstract text available
    Text: 54AC11238, 74AC11238 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS D3103. APRIL 1988 - REVISED APRIL 1993 * * * * * * * * Designed Specifically for High-Speed Memory Decoders and Data Transmission


    OCR Scan     		54AC11238, 74AC11238 D3103. AC11138 500-mA 300-milTexas D3103, 19ba PDF

    Untitled

    Abstract: No abstract text available
    Text: 54AC11245, 74AC11245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS _ P2957, JULY 1987 - REVISED APRIL 1993 54AC11245 . . . JT PACKAGE 74AC11244. . . DB, DW, NT, OR PW PACKAGE 3-State Outputs Drive Bus Lines Directly Flow-Through Architecture Optimizes


    OCR Scan     		54AC11245, 74AC11245 P2957, 500-mA 300-mil 54AC11245 74AC11244. PDF

    PHL 99

    Abstract: No abstract text available
    Text: 74AC11280 9-BIT PARITY GENERATOR/CHECKER _ SCAS055A - D3201, APRIL 1989 - REVISED APRIL 1993 D OR N PACKAGE TOP VIEW * Generates Either Odd or Even Parity for Nine Data Unes * Cascadable for n-BKs Parity B[ A[ £ ODD [ GND [ 2 EVEN [ NC [ ll * Flow-Through Architecture to Optimize


    OCR Scan     		74AC11280 SCAS055A D3201, 500-mA 300-mil PHL 99 PDF

    Untitled

    Abstract: No abstract text available
    Text: Technical Data CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 Tf x a s In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SC H S282 IS- » 2 1JÎK IC f*ÎR • 3 4 1 1 • IO Dual “J-K” Flip-Flop with Set and Reset F /F 1 CD54/74AC/ACT109 - Positive-Edge-Triggered J, K


    OCR Scan     		CD54/74AC109, CD54/74AC112 CD54/74ACT109, CD54/74ACT112 CD54/74AC/ACT109 CD54/74AC/ACT112 CS-36532 CD54/74AC109 PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AC11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS01 OB - JULY 1987 - REVISED APRIL 1996 3-State Outputs Drive Bus Lines Directly DB, DW, NT, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout A1 [ 1 Center-Pin V^c and GND Configurations


    OCR Scan     		74AC11245 SCAS01 500-mA 300-mil PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AC11244 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCAS171 B - MARCH 1987 - REVISED SEPTEMBER 1998 EPIC Enhanced-Performance Implanted CMOS 1- u r n Process DB, DW, NT, OR PW PACKAGE (TOP VIEW) 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers


    OCR Scan     		74AC11244 SCAS171 500-mA PDF

    Untitled

    Abstract: No abstract text available
    Text: 74AC11353 DUAL 1 -0 R -4 DATA SELECTOR/MULTIPLEXER SCAS044A-JUNE 1 9 8 8- REVISED APRIL 1993 • • • Inverting Version of 74AC11253 Permits Multiplexing from N Lines to 1 Line Performs Parallel-to-Serial Conversion • Flow-Through Architecture Optimizes PCB


    OCR Scan     		74AC11353 SCAS044A-JUNE 74AC11253 300-mil PDF