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    74AUP2G79DC Search Results

    74AUP2G79DC Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    SN74AUP2G79DCUR Texas Instruments Low-Power Dual Positive-Edge-Triggered D-Type Flip-Flop 8-VSSOP -40 to 85 Visit Texas Instruments Buy
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    74AUP2G79DC Price and Stock

    Texas Instruments SN74AUP2G79DCUR

    IC FF D-TYPE DUAL 1BIT 8VSSOP
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    DigiKey SN74AUP2G79DCUR Cut Tape 8,402 1
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    SN74AUP2G79DCUR Digi-Reel 8,402 1
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    SN74AUP2G79DCUR Reel 6,000 3,000
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    Mouser Electronics SN74AUP2G79DCUR 6,747
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    Newark SN74AUP2G79DCUR Cut Tape 1
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    Nexperia 74AUP2G79DC-Q100H

    IC FF D-TYPE DUAL 1BIT 8VSSOP
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    DigiKey 74AUP2G79DC-Q100H Cut Tape 2,985 1
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    74AUP2G79DC-Q100H Digi-Reel 2,985 1
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    74AUP2G79DC-Q100H Reel 3,000
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    Newark 74AUP2G79DC-Q100H Reel 3,000
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    Rochester Electronics 74AUP2G79DC-Q100H 66,000 1
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    Nexperia 74AUP2G79DC,125

    IC FF D-TYPE DUAL 1BIT 8VSSOP
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    DigiKey 74AUP2G79DC,125 Cut Tape 2,980 1
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    74AUP2G79DC,125 Digi-Reel 2,980 1
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    Mouser Electronics 74AUP2G79DC,125 4,467
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    Rochester Electronics 74AUP2G79DC,125 20,677 1
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    EBV Elektronik 74AUP2G79DC,125 10 Weeks 3,000
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    Rochester Electronics LLC 74AUP2G79DC,125

    IC FF D-TYPE DUAL 1BIT 8VSSOP
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    DigiKey 74AUP2G79DC,125 Bulk 1,998
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    NXP Semiconductors 74AUP2G79DC,125

    74AUP2G79DC - D Flip-Flop, AUP/ULP/V Series, 2-Func, Positive Edge Triggered, 1-Bit, True Output, VSSOP-8
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    Rochester Electronics 74AUP2G79DC,125 72,000 1
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    74AUP2G79DC Datasheets (8)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP2G79DC NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger Original PDF
    74AUP2G79DC NXP Semiconductors Low-power dual D-type flip-flop, positive-edge trigger Original PDF
    74AUP2G79DC NXP Semiconductors 74AUP2G79 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8, FF/Latch Original PDF
    74AUP2G79DC,125 NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT765-1 (VSSOP8); Container: Reel Pack, Reverse, Reverse Original PDF
    74AUP2G79DC,125 NXP Semiconductors 74AUP2G79 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT-765-1, VSSOP-8, FF/Latch Original PDF
    74AUP2G79DC-Q100 NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger Original PDF
    74AUP2G79DC-Q100125 NXP Semiconductors IC FF D-TYPE DUAL 1BIT 8VSSOP Original PDF
    74AUP2G79DC-Q100H NXP Semiconductors 74AUP2G79DC-Q100 - 74AUP2G79DC-Q100 - Low-power dual D-type flip-flop; positive-edge trigger Original PDF

    74AUP2G79DC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Dual D-type flip-flop positive-edge trigger

    Abstract: No abstract text available
    Text: 74AUP2G79 Low-power dual D-type flip-flop; positive-edge trigger Rev. 6 — 8 December 2011 Product data sheet 1. General description The 74AUP2G79 provides the dual positive-edge triggered D-type flip-flop. Information on the data input nD is transferred to the nQ output on the LOW-to-HIGH transition of the


    Original     		PDF 74AUP2G79 74AUP2G79 Dual D-type flip-flop positive-edge trigger

    Dual D-type flip-flop positive-edge trigger

    Abstract: JESD22-A114E JESD78 74AUP2G79 74AUP2G79DC 74AUP2G79GT p79 marking
    Text: 74AUP2G79 Low-power dual D-type flip-flop; positive-edge trigger Rev. 04 — 30 June 2009 Product data sheet 1. General description The 74AUP2G79 provides the dual positive-edge triggered D-type flip-flop. Information on the data input nD is transferred to the nQ output on the LOW-to-HIGH transition of the


    Original     		PDF 74AUP2G79 74AUP2G79 Dual D-type flip-flop positive-edge trigger JESD22-A114E JESD78 74AUP2G79DC 74AUP2G79GT p79 marking

    74AUP2G79

    Abstract: 74AUP2G79DC 74AUP2G79GM 74AUP2G79GT JESD22-A114E JESD78
    Text: 74AUP2G79 Low-power dual D-type flip-flop; positive-edge trigger Rev. 02 — 19 March 2008 Product data sheet 1. General description The 74AUP2G79 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74AUP2G79 74AUP2G79 74AUP2G79DC 74AUP2G79GM 74AUP2G79GT JESD22-A114E JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G79 Low-power dual D-type flip-flop; positive-edge trigger Rev. 8 — 24 January 2013 Product data sheet 1. General description The 74AUP2G79 provides the dual positive-edge triggered D-type flip-flop. Information on the data input nD is transferred to the nQ output on the LOW-to-HIGH transition of the


    Original     		PDF 74AUP2G79 74AUP2G79

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G79-Q100 Low-power dual D-type flip-flop; positive-edge trigger Rev. 1 — 11 June 2013 Product data sheet 1. General description The 74AUP2G79-Q100 provides the dual positive-edge triggered D-type flip-flop. Information on the data input nD is transferred to the nQ output on the LOW-to-HIGH


    Original     		PDF 74AUP2G79-Q100 74AUP2G79-Q100 74AUP2G79

    74AUP2G79

    Abstract: 74AUP2G79DC 74AUP2G79GT JESD78
    Text: 74AUP2G79 Low-power dual D-type flip-flop; positive-edge trigger Rev. 5 — 30 September 2010 Product data sheet 1. General description The 74AUP2G79 provides the dual positive-edge triggered D-type flip-flop. Information on the data input nD is transferred to the nQ output on the LOW-to-HIGH transition of the


    Original     		PDF 74AUP2G79 74AUP2G79 74AUP2G79DC 74AUP2G79GT JESD78

    74AUP2G79

    Abstract: 74AUP2G79DC 74AUP2G79GM 74AUP2G79GT SN74AUC2G79 SN74AUC2G79DCTR
    Text: SLG74LB2G79 GreenLIBTM DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP General Description Features The GreenLIB provides a low-power, low-voltage dual • Pb-Free / RoHS Compliant positive-edge-triggered D-type flip-flop. When data at the • Halogen-Free data D input meets the setup time requirement, the data is


    Original     		PDF SLG74LB2G79 LB2G79 000-0074LB2G79-11 74AUP2G79 74AUP2G79DC 74AUP2G79GM 74AUP2G79GT SN74AUC2G79 SN74AUC2G79DCTR

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G79 Low-power dual D-type flip-flop; positive-edge trigger Rev. 01 — 6 October 2006 Product data sheet 1. General description The 74AUP2G79 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74AUP2G79 74AUP2G79

    74AUP2G79

    Abstract: 74AUP2G79DC 74AUP2G79GT JESD22-A114E JESD78
    Text: 74AUP2G79 Low-power dual D-type flip-flop; positive-edge trigger Rev. 03 — 1 April 2009 Product data sheet 1. General description The 74AUP2G79 provides the dual positive-edge triggered D-type flip-flop. Information on the data input nD is transferred to the nQ output on the LOW-to-HIGH transition of the


    Original     		PDF 74AUP2G79 74AUP2G79 74AUP2G79DC 74AUP2G79GT JESD22-A114E JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G79 Low-power dual D-type flip-flop; positive-edge trigger Rev. 7 — 14 June 2012 Product data sheet 1. General description The 74AUP2G79 provides the dual positive-edge triggered D-type flip-flop. Information on the data input nD is transferred to the nQ output on the LOW-to-HIGH transition of the


    Original     		PDF 74AUP2G79 74AUP2G79