8205 decoder
Abstract: 74LS138 decoder
Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: Double-Buffered Latch ● VOLTAGE OUTPUT: ±10V, ±5V, +10V
|
Original
|
DAC811
12-BIT
DAC811,
74LS138
DAC811s
8205 decoder
74LS138 decoder
|
PDF
|
DAC811
Abstract: DAC811A DAC811AH DAC811BH DAC811J DAC811RH DAC811SH DAC811AN 74LS138 decoder
Text: DAC811 Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: DOUBLE-BUFFERED LATCH ● VOLTAGE OUTPUT: ±10V, ±5V, +10V ● MONOTONICITY GUARANTEED OVER TEMPERATURE ● ±1/2LSB MAXIMUM NONLINEARITY OVER
|
Original
|
DAC811
12-BIT
DAC811
DAC811s
DAC811A
DAC811AH
DAC811BH
DAC811J
DAC811RH
DAC811SH
DAC811AN
74LS138 decoder
|
PDF
|
DAC811
Abstract: DAC811A DAC811AH DAC811BH DAC811J DAC811RH DAC811SH 74LS138 decoder
Text: DAC811 Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES Input gating logic is designed so that loading the last nibble or byte of data can be accomplished simultaneously with the transfer of data previously stored in adjacent latches from adjacent input latches to the
|
Original
|
DAC811
12-BIT
DAC811,
DAC811s
DAC811
DAC811A
DAC811AH
DAC811BH
DAC811J
DAC811RH
DAC811SH
74LS138 decoder
|
PDF
|
74LS138 decoder
Abstract: pin for 74LS138
Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: Double-Buffered Latch ● VOLTAGE OUTPUT: ±10V, ±5V, +10V
|
Original
|
DAC811
12-BIT
74LS138 decoder
pin for 74LS138
|
PDF
|
74LS138 3 to 8 decoder notes
Abstract: 74LS138 DAC811 DAC811A DAC811AH DAC811BH DAC811J DAC811RH DAC811SH X0116
Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: DOUBLE-BUFFERED LATCH ● VOLTAGE OUTPUT: ±10V, ±5V, +10V
|
Original
|
DAC811
12-BIT
DAC811
74LS138
DAC811s
74LS138 3 to 8 decoder notes
74LS138
DAC811A
DAC811AH
DAC811BH
DAC811J
DAC811RH
DAC811SH
X0116
|
PDF
|
DAC811KU-1
Abstract: ic 74ls138 pdf datasheet DAC811 DAC811A DAC811AH DAC811BH DAC811J DAC811JP block diagram of 74LS138 3 to 8 decoder 74LS138 pin diagram
Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: Double-Buffered Latch ● VOLTAGE OUTPUT: ±10V, ±5V, +10V
|
Original
|
DAC811
12-BIT
DAC811
DAC811KU-1
ic 74ls138 pdf datasheet
DAC811A
DAC811AH
DAC811BH
DAC811J
DAC811JP
block diagram of 74LS138 3 to 8 decoder
74LS138 pin diagram
|
PDF
|
8205 decoder
Abstract: 74LS138 decoder DAC811 DAC811A DAC811AH DAC811BH DAC811J DAC811JP block diagram of 74LS138 1 line to 16 line 74LS138 3 to 8 decoder notes
Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: Double-Buffered Latch ● VOLTAGE OUTPUT: ±10V, ±5V, +10V
|
Original
|
DAC811
12-BIT
DAC811
8205 decoder
74LS138 decoder
DAC811A
DAC811AH
DAC811BH
DAC811J
DAC811JP
block diagram of 74LS138 1 line to 16 line
74LS138 3 to 8 decoder notes
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: Double-Buffered Latch ● VOLTAGE OUTPUT: ±10V, ±5V, +10V
|
Original
|
DAC811
12-BIT
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: Double-Buffered Latch ● VOLTAGE OUTPUT: ±10V, ±5V, +10V
|
Original
|
DAC811
12-BIT
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: Double-Buffered Latch ● VOLTAGE OUTPUT: ±10V, ±5V, +10V
|
Original
|
DAC811
12-BIT
|
PDF
|
74LS138 decoder
Abstract: ic 74ls138 pdf datasheet DAC811 DAC811A DAC811AH DAC811BH DAC811J DAC811JP
Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: Double-Buffered Latch ● VOLTAGE OUTPUT: ±10V, ±5V, +10V
|
Original
|
DAC811
12-BIT
DAC811
74LS138 decoder
ic 74ls138 pdf datasheet
DAC811A
DAC811AH
DAC811BH
DAC811J
DAC811JP
|
PDF
|
74LS139 application
Abstract: DAC811KU-1
Text: DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES ● SINGLE INTEGRATED CIRCUIT CHIP ● MICROCOMPUTER INTERFACE: Double-Buffered Latch ● VOLTAGE OUTPUT: ±10V, ±5V, +10V
|
Original
|
DAC811
12-BIT
74LS139 application
DAC811KU-1
|
PDF
|
pin diagram of ic 74ls139
Abstract: 74LS139 74LS
Text: Signetics 74LS139, S139 Decoders/Demultiplexers Dual 1-of-4 Decoder/Demultiplexer Product Specification Logic Products FEATURES • Demultiplexing capability • Two independent 1-of-4 decoders • Multifunction capability • Replaces 9321 and 93L21 for higher performance
|
OCR Scan
|
LS139
93L21
74LS139
74S139
500ns
500ns
pin diagram of ic 74ls139
74LS
|
PDF
|
Untitled
Abstract: No abstract text available
Text: GD54/74LS139 DUAL 2-TO-4-UNE DECODERS/DEMULTIPLEXERS Feature • Designed Specifically for High Speed Memory Decoders and Data Transmission Systems • Schottky Clamped for High Performance Pin Configuration SELECT V çç 25 2A 2B DATA OUTPUTS 2VQ 2V1 2Y2
|
OCR Scan
|
GD54/74LS139
|
PDF
|
|
|
Untitled
Abstract: No abstract text available
Text: GD54/74LS139 DUAL 2-TO-4-LINE DECODERS/DEMULTIPLEXERS Feature Pin Configuration • • Designed Specifically for High Speed Memory Decoders and Data Transmission Systems Schottky Clamped for High Performance Vçç SELECT DATA OUTPUTS ENABLE^_ _
|
OCR Scan
|
GD54/74LS139
|
PDF
|
74LS139 pin configuration with
Abstract: 74LS139 74ls139 decoder pin configuration 74ls139 decoder 54LS 74LS
Text: GD54/74LS139 DUAL 2-TO-4-LINE DECODERS/DEMULTIPLEXERS Feature • • Designed Specifically for High Speed Memory Decoders and Data Transmission Systems Schottky Clamped for High Performance Pin Configuration V çç SELECT DATA OUTPUTS ENABLE^_ _ _
|
OCR Scan
|
GD54/74LS139
74LS139 pin configuration with
74LS139
74ls139 decoder pin configuration
74ls139 decoder
54LS
74LS
|
PDF
|
74ls139 decoder pin configuration
Abstract: 74LS139 74LS139 pin configuration with S139 demultiplexer 74ls 74LS139 application 74LS139 equivalent 74ls139 pin diagram 74S139 74LS
Text: 74 LS1 3 9, S139 Decoders/Demultiplexers S ig n e t ic s Dual 1-of-4 Decoder/Demultiplexer Product Specification Logic Products FEATURES • • • • Demultiplexing capability Two independent 1-of-4 decoders Multifunction capability Replaces 9321 and 93L21 for
|
OCR Scan
|
93L21
74LS139,
1N916,
1N3064,
500ns
74ls139 decoder pin configuration
74LS139
74LS139 pin configuration with
S139
demultiplexer 74ls
74LS139 application
74LS139 equivalent
74ls139 pin diagram
74S139
74LS
|
PDF
|
75LS139
Abstract: pin diagram of ic 74ls139 74HC139 of ic 74ls139 GX414CD m74hc139n
Text: GENNUM C O R P O R A T I 16x1 VIDEO MULTIPLEXER EVALUATION BOARD O N by Ian Ridpath, Senior Applicahon Engineer, Video and Broadcast Products Group APPLICATION NOTE INTRODUCTION This application note de scribes the construction and use of If more than one device is used, the ADDRESS inputs for each
|
OCR Scan
|
GX414.
GX414A,
GX424
GX434
10-SO
GX424
75LS139
pin diagram of ic 74ls139
74HC139
of ic 74ls139
GX414CD
m74hc139n
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 139 139 CONNECTION DIAGRAM PINOUT A // 54S/74S139 d / 6 b c \/54LS/74LS139 6 i o ^ ' f ° 7 DUAL 1-0F-4 DECODER D E S C R IP TIO N — The ’139 is a high speed dual 1-of-4 decoder/dem ultiplexer. The device has tw o independent decoders, each accepting tw o inputs
|
OCR Scan
|
54S/74S139
\/54LS/74LS139
54/74LS
54/74S
|
PDF
|
74LS139PC
Abstract: 74LS139P 74LS139DC
Text: ;'1 NATIONAL SEMICOND -CLO.GIO OSE D | bSDllPS 00b3fll? D | 139 139 T-66-21-55 CONNECTION DIAGRAM P IN O U T 54S/74S139 54LS/74LS139 A o a [I i s ] Eb A la [ 7 Î 7 ] Aob Öoa [ T 75] 1 2 ]Ö 0 b Ö 2a [ ? T ijö ib Ô 3 a [T 10] 5 2 b [? ~9~1 0 3 b DESCRIPTION — The *139 is a high speed dual t-of-4 decoder/demulti
|
OCR Scan
|
00b3fll?
54S/74S139
54LS/74LS139
T-66-21-55
bS01155
54/74LS
54/74S
74LS139PC
74LS139P
74LS139DC
|
PDF
|
Untitled
Abstract: No abstract text available
Text: J S f IDT54/74HCT139 CMOS DUAL 1-0F-4 DECODER Integrated Device Technology Inc in T 7 9 T 'V t ä IU I CN] CO LO FEATURES • • • • • • • • • High speed, comparable to bipolar: 9ns typ. CMOS low power levels: 50 typ. Inputs and outputs directly TTL-compatible
|
OCR Scan
|
IDT54/74HCT139
54/74LS139
72T339)
MIL-STD-883
IDT54/74HCT139
IDT72T339
MIL-STD-883,
|
PDF
|
DAC81
Abstract: No abstract text available
Text: For Immediate Assistance, Contact Your Local Salesperson B U R R -B R O W N E DAC811 1 Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER FEATURES Input gating logic is designed so that loading the last nibble or byte of data can be accomplished simulta
|
OCR Scan
|
DAC811
12-BIT
313bS
0Q31fi01
DAC81
|
PDF
|
74LS138 decoder
Abstract: 74ls139 decoder pin configuration 8205 microprocessor ic 74 LS 138 DECODER data sheet DAC811 DAC811A DAC811AH DAC811BH DAC811J DAC811RH
Text: B U R R -B R O W N DAC811 :. S :. For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER Input gating logic is designed so that loading the last nibble or byte of data can be accomplished simulta
|
OCR Scan
|
DAC811
12-BIT
DAC811
74LS138
16-BIT
DAC811,
DAC811s
74LS138 decoder
74ls139 decoder pin configuration
8205 microprocessor
ic 74 LS 138 DECODER data sheet
DAC811A
DAC811AH
DAC811BH
DAC811J
DAC811RH
|
PDF
|
IC 74hct139
Abstract: 20 PIN LEADLESS CHIP CARRIER 74LS373 Decoder 8251A 1N916 74hct139
Text: HIGH SPEED CMOS DUAL 1-OF-4 DECODER Integrated Dev ice Technology. Inc IDT54/74HCT139 IDT72T339 i cr> CN CO FEATURES data-routing applications requiring very short propagation delay tim es, but needing very low power consum ption. The ID T 54/74H C T139 is pin and functionally com patible
|
OCR Scan
|
IDT54/74HCT139
IDT72T339
54/74LS139
72T339)
MIL-STD-883
IDT72T339
MIL-STD-883,
IC 74hct139
20 PIN LEADLESS CHIP CARRIER
74LS373 Decoder
8251A
1N916
74hct139
|
PDF
|
