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    74LS21 IC Search Results

    74LS21 IC Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LS21P-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS21FPEL-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation

    74LS21 IC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    TTL 74ls21

    Abstract: 751A-02 motorola 74ls21
    Text: SN54/74LS21 DUAL 4-INPUT AND GATE DUAL 4-INPUT AND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN


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    PDF SN54/74LS21 51A-02 SN54LSXXJ SN74LSXXN SN74LSXXD TTL 74ls21 751A-02 motorola 74ls21

    74LS21

    Abstract: TTL 74ls21 sn54/74ls21 751A-02
    Text: SN54/74LS21 DUAL 4-INPUT AND GATE DUAL 4-INPUT AND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN


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    PDF SN54/74LS21 51A-02 SN54LSXXJ SN74LSXXN SN74LSXXD 74LS21 TTL 74ls21 sn54/74ls21 751A-02

    M54HC21

    Abstract: M54HC21F1R M74HC21 M74HC21B1R M74HC21C1R M74HC21M1R
    Text: M54HC21 M74HC21 DUAL 4-INPUT AND GATE . . . . . . . . HIGH SPEED tPD = 10 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28% VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


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    PDF M54HC21 M74HC21 54/74LS21 M54HC21F1R M74HC21M1R M74HC21B1R M74HC21C1R M54/74HC21 M54HC21 M54HC21F1R M74HC21 M74HC21B1R M74HC21C1R M74HC21M1R

    M54HC21

    Abstract: M54HC21F1R M74HC21 M74HC21B1R M74HC21C1R M74HC21M1R
    Text: M54HC21 M74HC21 DUAL 4-INPUT AND GATE . . . . . . . . HIGH SPEED tPD = 10 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28% VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


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    PDF M54HC21 M74HC21 54/74LS21 M54HC21F1R M74HC21M1R M74HC21B1R M74HC21C1R M54/74HC21 M54HC21 M54HC21F1R M74HC21 M74HC21B1R M74HC21C1R M74HC21M1R

    7421 pin configuration

    Abstract: 7420 pin configuration 74LS20 PIN CONFIGURATION 7421 logic gate 7421 AND 74LS20 function table 74LS21 PIN CONFIGURATION TTL 7420 7421 AND gate PIN CONFIGURATION 7420
    Text: Signehcs I 7420, 7421, LS20, LS21, S20 Gates Logic Products Dual Four-Input NAND '20 AND ('21) Gate Product Specification • TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7420 10ns 8mA 74LS20 10ns 0.8mA 8mA 74S20 3ns 7421 12ns 8mA 74LS21


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    PDF 74LS20 74S20 74LS21 N7420N, N74LS20N, N74S20N N7421N, N74LS21N N74LS20D, N74S20D, 7421 pin configuration 7420 pin configuration 74LS20 PIN CONFIGURATION 7421 logic gate 7421 AND 74LS20 function table 74LS21 PIN CONFIGURATION TTL 7420 7421 AND gate PIN CONFIGURATION 7420

    TTL 7421

    Abstract: 7421 ttl AND gate 7421 pin configuration PIN CONFIGURATION 7420 TTL 7420 logic gate 7421 AND 74LS20 PIN CONFIGURATION 7420 pin configuration 7420 SIGNETICS TTL 74LS20
    Text: 7420, 7421, LS20, LS21, S20 Signetics Gates Dual Four-Input NAND 20 AND (’21) Gate Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT (TOTAL) TYPICAL PROPAGATION DELAY 7420 10ns 8mA 74LS20 10ns 0.8mA 74S20 3 ns 8mA 7421 12ns 8mA 74LS21 9ns


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    PDF 74LS20 74S20 74LS21 N7420N, N74LS20N, N74S20N N7421N, N74LS21N N74LS20D, N74S20D, TTL 7421 7421 ttl AND gate 7421 pin configuration PIN CONFIGURATION 7420 TTL 7420 logic gate 7421 AND 74LS20 PIN CONFIGURATION 7420 pin configuration 7420 SIGNETICS TTL 74LS20

    74LS21

    Abstract: 7421 pin configuration 74LS N7421F N7421N N74H21F N74H21N N74LS21F N74LS21N S5421F
    Text: 54/7421 54H/74H21 54LS/74LS21 ORDERING CODE PIN CONFIGURATIONS See Section 9 for further Package and Ordering Information. C O M M E R C IA L RANGES = 5V ± 5%; T a = 0°C to *70°C PACKAGES PIN CON F. Plastic DIP Fig. A Fig. A N7421N N74H21N N74LS21N


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    PDF 54H/74H21 54LS/74LS21 N7421N N74H21N N74LS21N N7421F N74H21F N74LS21F S5421F S54H21F 74LS21 7421 pin configuration 74LS N7421F N7421N N74LS21N S5421F

    74LS21 PIN CONFIGURATION

    Abstract: 74LS21 54LS 74LS
    Text: GD54/74LS21 DUAL 4-INPUT POSITIVE AND GATES Description Pin Configuration This device contains two independent 4-input AND gates. It performs the Boolean functions Y = A B C D or Y = A + B + C + D in positive logic. V Cc 2D 2C NC 2B 2A 2Y 1A 1B NC 1C 1D 1Y


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    PDF GD54/74LS21 74LS21 PIN CONFIGURATION 74LS21 54LS 74LS

    7421 AND gate

    Abstract: 7421 74LS21 74LS21P 7421 Dual 4-input AND gate 74LS21PC 74LS21DC DC5421 54H21DM 54H21FM
    Text: 21 CO NNECTIO N DIAGRAMS PINOUT A /5 4 /7 4 2 1 i/54H/74H21 r 54LS/74LS21 / m s t - ^ fo f/c a DUAL 4-IN P U T POSITIVE AND GATE ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, T a = 0°C to +70° C Vcc = +5.0 V +10%,


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    PDF -i/54H/74H21-54LS/74LS21 74H21 74LS21PC 74LS21 54H21DM 54LS21 74H21FC 7421 AND gate 7421 74LS21P 7421 Dual 4-input AND gate 74LS21PC 74LS21DC DC5421 54H21FM

    74ls21 IC

    Abstract: No abstract text available
    Text: SANYO SEMICONDUCTOR CORP I EE D LC74HC21 PU 1 im a n n DQoat .33 a CMOS High-Speed Standard Logic LC74HC Series 3003a Dual 4-Input AND Gate E 1743C Features • The LC74HC21 consists of 2 identical 4-input AND gates. • Uses CMOS silicon gate process technology to achieve operating speeds similar to L S -T T L (74LS21 with the


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    PDF LC74HC21 1743C 3003a LC74HC LC74HC21 74LS21) 54LS/74 74ls21 IC

    74ls21p

    Abstract: 7421 Dual 4-input AND gate 74LS21 74H21 7421 54H21DM 54H21FM 54LS21 54LS21FM 74LS21PC
    Text: 21 C O N N E C T IO N D IA G R A M S P IN O U T A /5 4 /7 4 2 1 54H /74H 21 r / ^54LS/74LS21 ^^ DUAL 4-IN P U T POSITIVE AND GATE O R D E R IN G CO D E: See S e ctio n 9 PIN PKGS OUT C O M M E R C IA L G RADE M ILITA R Y G RADE V c c = + 5.0 V ±5%, T a = 0 °C to + 7 0 ° C


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    PDF 54H/74H21 54LS/74LS21 74H21 74LS21PC 74LS21 54H21DM 54LS21 54LS21FM 74ls21p 7421 Dual 4-input AND gate 7421 54H21FM 74LS21PC

    CI 74LS08

    Abstract: 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 74ls32 TTL 7409 TTL 7486 TTL 74ls86 TTL 7432 fairchild
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi


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    PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, CI 74LS08 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 74ls32 TTL 7409 TTL 7486 TTL 74ls86 TTL 7432 fairchild

    logic diagram of 7432

    Abstract: CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn


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    PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, logic diagram of 7432 CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL

    Untitled

    Abstract: No abstract text available
    Text: SGS-THOMSON *JÆURjflDÊIMJllILiÊTrmDÊi M54HC21 M74HC21 DUAL 4-INPUT AND GATE • HIGH SPEED tpD = 11 ns TYP. at VCc = 5V ■ LOW POWER DISSIPATION Icc = 1 #iA (MAX.) at Ta = 25°C ■ HIGH NOISE IMMUNITY V nih = VN|L = 28“/ o VCC (MIN.) ■ OUTPUT DRIVE CAPABILITY


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    PDF M54HC21 M74HC21 M54HC21 M74HC21 54/74LS21 M54/74HC21

    Untitled

    Abstract: No abstract text available
    Text: TYPES SN74LS21, SN54LS21 DUAL 4-INPUT POSITIVE-AND GATES R E V IS E D A P R IL 1985 • Package Options Include Standard Plastic N and Ceram ic (J) 300-mil D ual-In-Line Pa ckage s, P la stic Sm all Outline (D) and Ceramic Chip Carrier <FK) Package • Dependable Texas Instruments Quality and


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    PDF SN74LS21, SN54LS21 300-mil

    Untitled

    Abstract: No abstract text available
    Text: SbE D • 7 ^ 2 3 ? D 0 3 eJ 7 74 Û12 ■ S G T H r z z S C S -T H O M S O N M 54H C 21 ^ ■ 7 # . ¡ a ffim iC T E iM n ig s _ M 7 4 H C 2 1 S Q S - THOMSON 2 / DUAL 4-INPUT AND GATE ■ HIGH SPEED tpo = 11 ns TYP. at V c c = 5V ■ LOW POWER DISSIPATION


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    PDF

    TTL 7486

    Abstract: FL 9014 TTL 7421 ttl 7432 TTL 7411 TTL 7409 7486 TTL 7411 74LS86 74LS08
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi ly i r n


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    PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, TTL 7486 FL 9014 TTL 7421 ttl 7432 TTL 7411 TTL 7409 7486 TTL 7411 74LS86 74LS08

    Untitled

    Abstract: No abstract text available
    Text: r z 7 S C S -T H O M S O N Ä 7# M54HC21 M74HC21 DUAL 4-INPUT AND GATE HIGH SPEED tpD = 10 ns TYP. AT Vcc = 5 V LOW POWER DISSIPATION Ice = 1 nA (MAX.) AT Ta = 25 "C HIGH NOISE IMMUNITY Vnih = Vnil = 28% Vcc (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTLLOADS SYMMETRICAL OUTPUT IMPEDANCE


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    PDF M54HC21 M74HC21 54/74LS21 M54HC21F1R M74HC21M1R M74HC21B1R M74HC21C1R M54/74HC21 0QS4367

    pin configuration ic 74LS21

    Abstract: 74LS21 PIN CONFIGURATION PIN CONFIGURATION OF 74LS21 74ls21B Mitsubishi tm
    Text: MITSUBISHI HIGH SPEED CMOS M 74H C 21P/FP/D P DUAL 4-INPUT PO SITIVE AND GATE DESCRIPTION T h e M 7 4 H C 2 1 is a s e m ic o n d u c to r in te g ra te d c irc u it c o n ­ PIN CONFIGURATION TOP VIEW s is tin g of tw o 4 -in p u t p o s itiv e -lo g ic A N D g a te s, u s a b le as


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    PDF 21P/FP/D pin configuration ic 74LS21 74LS21 PIN CONFIGURATION PIN CONFIGURATION OF 74LS21 74ls21B Mitsubishi tm

    74LS21M

    Abstract: No abstract text available
    Text: TYPES SN54H21, SNS4LS21, SN74H21. SN74LS21 DUAL 4-INPUT POSITIVE-AND GATES R E V ISE D APRIL 198B S N 5 4 H 2 1 . . J P A C K A G E Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic D IP s S N 5 4 L S 2 1 . . J O R W P A C K A G E


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    PDF SN54H21, SNS4LS21, SN74H21. SN74LS21 225Q12 74LS21M

    IC TTL 7432

    Abstract: 74LS86 gate diagram 7411 3 INPUT AND gate IC 7432 7411 pin diagram 74LS266 IC 7486 74LS series logic gate symbols FL 9014 TTL 74126
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn


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    PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, IC TTL 7432 74LS86 gate diagram 7411 3 INPUT AND gate IC 7432 7411 pin diagram 74LS266 IC 7486 74LS series logic gate symbols FL 9014 TTL 74126

    74HC21A

    Abstract: No abstract text available
    Text: TOSHIBA TC74HC21AP/AF/AFN Dual 4-Input and Gate TheTC 74H C 21A is a high speed CMOS 4-INPUT AND GATE fabricated with silicon gate C 2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.


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    PDF TC74HC21AP/AF/AFN TC74HC/HCT 74HC21A

    Untitled

    Abstract: No abstract text available
    Text: TC74HC21AP/AF/AFN D U A L 4 - l W P U T A N D GATE T h e T C 7 4 H C 2 1 A is a h ig h sp ee d CM O S 4 - I N P U T A N D G A T E fa b r ic a te d w ith s ilic o n g a te C-M O S te c h n o lo g y . It a c h ie v e s th e h ig h sp ee d o p e r a tio n s im i la r to


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    PDF TC74HC21AP/AF/AFN TC74HC21

    CI 74LS21

    Abstract: 54HC 74HC M54HC21 M74HC21
    Text: SGS-THOMSON M54HC21 M74HC21 DUAL 4-INPUT AND GATE HIGH SPEED tPD = 11 ns TYP. at VCc = 5V LOW POWER DISSIPATION lCc = 1 /*A (MAX.) at Ta = 25°C HIGH NOISE IMMUNITY V NIH = VN|L = 28% VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE


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    PDF M54HC21 M74HC21 54/74LS21 M54/74HC21 M54/74HC21 CI 74LS21 54HC 74HC M74HC21