IR 30 D1
Abstract: No abstract text available
Text: SN74ALS236 64 x 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDAS107A-OCTOBER 1986 - REVISED SEPTEMBER 1993 Asynchronous Operation Organized as 64 Words by 4 Bits DW OR N PACKAGE TOP VIEW r NC [ 1 Data Rates From 0 to 30 MHz 3-State Outputs 16 J VCC 15 ] S O
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SN74ALS236
SDAS107A-OCTOBER
300-mll
256-bit
IR 30 D1
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Untitled
Abstract: No abstract text available
Text: sse • d flui?a3 ODflbiflfl t SNS4HC4066, TLC4066I SILICQN-GATE CMOS QUADRUPLE BILATERAL ANALOG SWITCH TEXAS INSTR LOGIC 02922, JANUARY 1988 High Degree of Linearity SN64HC4066 . . . J OR N PACKAGE T L C 40 66 I. . . D OR N PACKAG E • High On-Off Output Voltage Ratio
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SNS4HC4066,
TLC4066I
MM54/74HC4066,
MC54/74HC4066,
CD4066A
TLC4066
SN54HC4066,
T-51-11
--V02
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MIL-STD-463
Abstract: LM136-2.5
Text: LT1009, LT1009Y 2.5-V INTEGRATED REFERENCE CIRCUITS SLVS013E - MAY 1987 - REVISED AUGUST 1995 • • • • • • Excellent Temperature Stability Initial Tolerance. . . 0.2% Max
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LT1009,
LT1009Y
SLVS013E
LM136
LT1009
LT1009
MIL-STD-463
LM136-2.5
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24-042
Abstract: applications of microprocessor in printer TL16C450 TL16C451 TL16C452
Text: TL16C451, TL16C452 ASYNCHRONOUS COMMUNICATIONS ELEMENTS SLLS053A- D3284, MAY 1989 - REVISED JANUARY 1990 Fully Programmable Serial Interface Characteristics: 5-, 6-, 7-, or 8-Bit Characters Even-, Odd-, or No-Parity Bit Generation and Detection 1-, 1 1/2-, or 2 Stop-Bit Generation
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TL16C451,
TL16C452
SLLS053A-
D3284,
TL16C451
TL16C450
TL16C452
TL16C450S
24-042
applications of microprocessor in printer
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KVT 20 Temperature
Abstract: SN54ABTH182504A SN54ABTH18504A SN74ABTH182504A SN74ABTH18504A
Text: SN54ABTH18504A, SN54ABTH182504A, SN74ABTH18504A, SN74ABTH182504A SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS - S C B S 1 6 5 A - AU G U S T 1993 - REVISED AU G U S T 1994 ' Members of the Texas Instruments
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SN54ABTH18504A,
SN54ABTH182504A,
SN74ABTH18504A,
SN74ABTH182504A
20-BIT
--------SCBS165A-
ABTH182504A
KVT 20 Temperature
SN54ABTH182504A
SN54ABTH18504A
SN74ABTH182504A
SN74ABTH18504A
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SN74ALVCH16374
Abstract: No abstract text available
Text: SN74ALVCH16374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCES021 -JU L Y 1995 DGG OR DL PACKAGE {TOP VIEW Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 2000 V Per
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SN74ALVCH16374
16-BIT
SCES021
MIL-STD-833C,
JESD-17
300-mil
Zo-50
ATL17E3
SN74ALVCH16374
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74AC16374
Abstract: 4a53
Text: 74AC16374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCAS123A- P3470, MARCH 1 9 9 0 - REVISED APRIL 1993 logic diagram positive logic logic sym b o lt 1EN 10E 48 1CLK 24 20Ë 25 2CLK 47 1D1 1D2 1D3 1D4 1D5 1D6 1D7 1D8 201 2D2 203 2D4 2D5
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74AC16374
16-BIT
scas123a-
d3470,
1990-revised
74AC16374
4a53
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HC686
Abstract: G1.L SN54HC682 SN54HC684 SN74HC682 SN74HC684 hc682
Text: TYPES SN54HC682, SN54HC684, SN54HC686 SN74HC682, SN74HC684, SN74HC686 8 BIT MAGNITUDE COMPARATORS HIGH-SPEED CMOS LOGIC D 2 8 0 4 , M AR C H 1 9 8 4 S N 5 4 H C 6 8 2 , S N 5 4 H C 6 8 4 . . . J PACKAGE S N 7 4 H C 6 8 2 . S N 5 4 H C 6 8 4 . . J OR N PACKAGE
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SN54HC682,
SN54HC684,
SN54HC686
SN74HC682,
SN74HC684,
SN74HC686
D2804,
HC682
20-kfi
HC686
G1.L
SN54HC682
SN54HC684
SN74HC682
SN74HC684
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SN74ABT3611
Abstract: mdv 434
Text: SN74ABT3611 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SC B S 127C - JULY 1992 - RE V IS E D A P R IL 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Empty Flag EF and Almost-Empty Flag (AE) Synchronized by CLKB 64 x 36 Clocked FIFO Buffering Data From
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SN74ABT3611
SCBS127C
120-Pin
132-Pin
Cibl723
762G5
SN74ABT3611
mdv 434
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SN751177
Abstract: 11A1 RS-422-A SN751177NSLE SN751178 QDT1114 D3381
Text: 1%11„ SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS _ S L L S 0 5 9 A - D3381, FEBRUARY 1 9 9 0 -R E V IS E D JANUARY 1993 Meets EIA Standards RS-422-A, RS485 SN751177 — N PACKAGE TOP VIEW Meets CCITT Recommendations V.10, V 11 X.26, X.27
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SN751177,
SN751178
SLLS059A-
D3381,
1990-REVISED
RS-422-A,
RS485
of-12Vto
SN751177
00t1117
11A1
RS-422-A
SN751177NSLE
SN751178
QDT1114
D3381
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D1314
Abstract: SN75361 207B SN75107A SN75107B SN75207 SN75207B SN55109A
Text: SN75207, SN75207B DUAL SENSE AMPLIFIER FOR MOS MEMORIES OR DUAL HIGH-SENSITIVITY LINE RECEIVERS S LLS Q 69A - D1314, JULY 1973 - REVISED JANUARY 1993 □ O R N PACKAGE TO P V IE W Plug-In Replacement for SN75107A and SN75107B With Improved Characteristics
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SN75207,
SN75207B
SLLSQ69A-
D1314,
SN75107A
SN75107B
10-mV
SN55109A,
SN75109A,
D1314
SN75361
207B
SN75207
SN55109A
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k54c
Abstract: FD19 TL16PNP550A
Text: TL16PNP550A ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH PLUG AND PLAY PnP AND AUTO-FLOW CONTROL SLLS190A- MARCH 1995 -REVISED MAY 1995 PnP Card Auto-Conflguratlon Sequence Compliant External Pin-to-Bypass PnP Auto-Conflguratlon Sequence In UART Bypass Mode, the Stand Alone
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TL16PNP550A
SLLS190A-
10-Interrupts
IRQ9-IRQ12,
IRQ15
ST93C56/66
Equi85
4040005/B
MS-018
k54c
FD19
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PDF
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Untitled
Abstract: No abstract text available
Text: TEXAS INSTR LOGIC 25E O • flclt.l72'3 Q0flL7flfl 2 ■ SN54HC533, SN74HCS33 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D2S84, DECEMBER I9 8 2 -R E V IS E 0 SEPTEMBER 1307 SNB4HC533 . . . J PACKAGE SN74HC633 . . . D W O R N PACKAGE 8 Latches in a Single Package
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SN54HC533,
SN74HCS33
D2S84,
SNB4HC533
SN74HC633
300-mll
SN64HC633
SN74HC533
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d2544
Abstract: LS356 SN54LS354 SN54LS355 SN54LS356 SN74LS354 SN74LS355 SN74LS356 SN74LS35 909d
Text: S N 5 4 L S 3 5 4 , S N 5 4 L S 3 5 5 , S N 54L S 356 S N 7 4 L S 3 5 4 , S N 7 4 L S 3 5 5 , S N 74L S 356 8-LINE TO M IN E DATA SELECTORSIMULTIPLEXERS/REGISTERS SD LS164 0 2 5 4 4 , JULY 1979 —REVISED MARCH 1968 • Transparent Latches on Data Select Inputs
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SDLS164
SN54LS354,
SN54LS355,
SN54LS356
SN74LS354,
SN74LS355,
SN74LS356
D2544,
20-Pin
LS354
d2544
LS356
SN54LS354
SN54LS355
SN74LS354
SN74LS355
SN74LS35
909d
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SN74LVT652
Abstract: No abstract text available
Text: SN74LVT652 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS FEBRUARY 1992 PACKAGE PINOUT TOP VIEW Supports Mixed-Mode Signal Operation; 5 V Input and Output Voltages With 3.3 V Vcc ( • Supports Unregulated Battery Operation Down to 2.7 V • State-of-the-Art BICMOS Design for 3.3 V
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SN74LVT652
JESD-17
SN74LVES
7s266
SN74LVT652
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TCM2912
Abstract: TCM29C14A TCM2911 TCM129C13A TCM129C14A TCM129C16A TCM129C17A TCM2910A TCM2911A TCM29C13A
Text: TCM29C13A, TCM29C14A, TCM29C16A, TCM29C17A, TCM129C13A, TCM129C14A, TCM129C16A, TCM129C17A COMBINED SINGLE-CHIP PCM CODEC AND FILTER S CTS030D - A UG UST 1989 - REVISED JULY 1996 Replace Use of TCM2910A and TCM2911A in Tandem With TCM2912B/C FE A TU R E S TA B LE
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TCM29C13A,
TCM29C14A,
TCM29C16A,
TCM29C17A,
TCM129C13A,
TCM129C14A,
TCM129C16A,
TCM129C17A
SCTS030D
TCM2910A
TCM2912
TCM29C14A
TCM2911
TCM129C13A
TCM129C14A
TCM129C16A
TCM2911A
TCM29C13A
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PDF
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SLLS008C-D2S31
Abstract: SN75ALS193 d2931 AM26LS32A RS-422-A SN75ALS197
Text: SN75ALS193 QUAD DIFFERENTIAL LINE RECEIVER WITH 3-STATE OUTPUTS ^ * * * * * * * * * * * _ SLLS008C - D2931, JUNE 1986 - REVISED MARCH 1993 Meets EIA Standards RS-422-A and RS-423-A SN75ALS193 . . . J P A C K A G E t TOP VIEW
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fSN75ALS193
SLLS008C
D2931,
RS-422-A
RS-423-A
AM26LS32A
SN75ALS193
fi1bl724
SLLS008C-D2S31
d2931
AM26LS32A
SN75ALS197
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PDF
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Untitled
Abstract: No abstract text available
Text: 54ACT11652, 74ACT11652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS S CAS 087 - D 3106, APRIL 1993 Bus Transceivers/Registers 54A C T11652. . . JT PACKAGE 74ACT11652 . . . DW PACKAGE Independent Registers and Enables for A and B Buses TOP VIEW
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54ACT11652,
74ACT11652
500-mA
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PDF
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Untitled
Abstract: No abstract text available
Text: SN74ALS29854 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER SDAS118C - FEBRUARY 1987 - REVISED JANUARY 1995 Functionally Similar to AMD's AM29854 High-Speed Bus Transceiver With Parity Generator/Checker Parlty-Error Flag With Open-Collector Outputs Latch for Storing the Parlty-Error Flag
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SN74ALS29854
SDAS118C
AM29854
300-mll
752S5
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PDF
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D3964
Abstract: TLE2144I
Text: TLE2144, TLE2144A,TLE2144Y EXCALIBUR LOW-NOISE HIGH-SPEED PRECISION QUAD OPERATIONAL AMPLIFIERS D3964, N O VEM BER 1991 a v a ila b le fe a t u r e s Low Noise: 10 Hz 1 kHz Low Vio . . . 1.5 mV Max at 25°C 15 nV/Vflz 10.5 nV/VHz Single or Split Supply . . . 4 V to 44 V
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TLE2144,
TLE2144A
TLE2144Y
D3964,
000-pF
20-mA
TLE2144Ä
D3964
TLE2144I
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54ALS169B, SN54AS169A, SN74ALS169B, SN74AS169A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS ^ _ SDAS125B - M ARCH 1984 - REVISED DECEMBER 1994 • Fully Synchronous Operation for Counting and Programming • Internal Carry Look-Ahead Circuitry for
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SN54ALS169B,
SN54AS169A,
SN74ALS169B,
SN74AS169A
SDAS125B
300-mil
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54AS194, SN74AS194 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTERS SDAS212A - DE CE M B E R 1983 - RE V IS E D DECEM BER 1994 Parallel-to-Serlal, Serial-to-Parallel Conversions Left or Right Shifts Parallel Synchronous Loading Direct Overriding Clear Temporary Data-Latchlng Capability
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SN54AS194,
SN74AS194
SDAS212A
300-mll
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54ABT8996, SN74ABT8996 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS SCBS489 -AU GU ST 1994 * * * SN54ABT8996. JT PACKAGE SN74ABT8996. DB OR DW PACKAGE (TOP VIEW) A4[ A3 [ A2[ A1[ A0[ BYP [ GND [ PTDO [ PTCK[
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SN54ABT8996,
SN74ABT8996
10-BIT
SCBS489
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PDF
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Untitled
Abstract: No abstract text available
Text: SN74AS195 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER SDAS138B-DECEMBER 1983 - REVISED JANUARY 1995 Parallel-to-Serlai, Serlal-to-Parallel Conversions Parallel Synchronous Loading J and K Inputs to First Stage Right Shift Only With Complementary Outputs on Last Stage
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SN74AS195
SDAS138B-DECEMBER
300-mll
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PDF
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