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    8-PIN NOT BUFFER Search Results

    8-PIN NOT BUFFER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL1G07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    CS-DSDMDB09MF-010 Amphenol Cables on Demand Amphenol CS-DSDMDB09MF-010 9-Pin (DB9) Deluxe D-Sub Cable - Copper Shielded - Male / Female 10ft Datasheet
    CS-DSDMDB15MF-002.5 Amphenol Cables on Demand Amphenol CS-DSDMDB15MF-002.5 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Female 2.5ft Datasheet

    8-PIN NOT BUFFER Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    lfcsp_VQ package

    Abstract: AD8643
    Text: PIN CONFIGURATIONS OUT 1 +IN 3 NC 7 VCC 6 OUT 5 NC NC = NO CONNECT OUT A 1 –IN A 2 +IN A 3 V– 4 AD8642 TOP VIEW Not to Scale 8 V+ 7 OUT B 6 –IN B 5 +IN B 05072-105 Figure 2. 8-Lead SOIC (R-8) OUT A 1 –IN A 2 AD8642 +IN A 3 TOP VIEW (Not to Scale)


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    PDF AD8641/AD8642/AD8643 AD8641 14-lead 16-Lead CP-16-3 lfcsp_VQ package AD8643

    Untitled

    Abstract: No abstract text available
    Text: PIN CONFIGURATIONS OUT 1 +IN 3 NC 7 VCC 6 OUT 5 NC NC = NO CONNECT OUT A 1 –IN A 2 +IN A 3 V– 4 AD8642 TOP VIEW Not to Scale 8 V+ 7 OUT B 6 –IN B 5 +IN B 05072-105 Figure 2. 8-Lead SOIC (R-8) OUT A 1 –IN A 2 AD8642 +IN A 3 TOP VIEW (Not to Scale)


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    PDF AD8642 AD8643 14-lead 16-Lead

    Untitled

    Abstract: No abstract text available
    Text: FEATURES NIC 1 TOP VIEW Not to Scale NIC 7 V+ 6 OUT 5 NIC Figure 1. ADA4528-1 Pin Configuration, 8-Lead MSOP NIC 1 8 NIC –IN 2 ADA4528-1 +IN 3 TOP VIEW (Not to Scale) V– 4 7 V+ 6 OUT 5 NIC NOTES 1. NIC = NO INTERNAL CONNECTION. 2. CONNECT THE EXPOSED PAD TO


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    PDF ADA4528-1 ADA4528-1 ADA4528-2 ADA4528-1/ADA4528-2 CP-8-12 ADA4528-1/ADA4528-2 D09437-0-7/12

    Untitled

    Abstract: No abstract text available
    Text: Low-Cost, 3.3V Zero Delay Buffer NRND – Not Recommend for New Designs DATASHEET The MPC962309 is a zero delay buffer designed to distribute high-speed clocks. Available in a 16-pin SOIC or TSSOP package, the device accepts one reference input and drives nine low-skew clocks. The MPC962305 is the 8-pin


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    PDF MPC962309 16-pin MPC962305 MPC962305)

    Untitled

    Abstract: No abstract text available
    Text: Low-Cost, 3.3V Zero Delay Buffer NRND – Not Recommend for New Designs DATASHEET The MPC962309 is a zero delay buffer designed to distribute high-speed clocks. Available in a 16-pin SOIC or TSSOP package, the device accepts one reference input and drives nine low-skew clocks. The MPC962305 is the 8-pin


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    PDF MPC962309 16-pin MPC962305

    XFBGA PACKAGE OUTLINE

    Abstract: SST25WF080 BPL TV circuit
    Text: Not recommended for new designs. Please contact Microchip Sales for more details. 8 Mbit 1.8V SPI Serial Flash SST25WF080 Not Recommended for New Designs The SST25WF080 is a member of the Serial Flash 25 Series family and features a four-wire, SPI-compatible interface that allows for a low pin-count package


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    PDF SST25WF080 SST25WF080 DS25024C XFBGA PACKAGE OUTLINE BPL TV circuit

    Untitled

    Abstract: No abstract text available
    Text: Precision, Very Low Noise, Low Input Bias Current, Wide Bandwidth JFET Operational Amplifiers AD8510/AD8512/AD8513 PIN CONFIGURATIONS AD8510 8 NC NULL 1 7 V+ –IN 2 TOP VIEW 6 OUT Not to Scale V– 4 5 NULL NC V+ TOP VIEW 6 OUT (Not to Scale) V– 4 5 NULL


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    PDF AD8510/AD8512/AD8513 AD8510 AD8512 02729-0OIC 14-Lead

    DM44

    Abstract: 25AP-P edo dram 72-pin simm 4 m
    Text: NOT RECOMMENDED FOR NEW DESIGNS 4, 8 MEG x 32 DRAM SIMMs DRAM MODULE MT8D432 X MT16D832(X) For the latest data sheet revisions, please refer to the Micron Web site: www.micronsemi.com/datasheets/ datasheet.html FEATURES PIN ASSIGNMENT (Front View) • JEDEC- and industry-standard pinout in a 72-pin,


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    PDF MT8D432 MT16D832 72-pin, 048-cycle 72-Pin DM44 25AP-P edo dram 72-pin simm 4 m

    edo dram 50ns 72-pin simm

    Abstract: edo dram 60ns 72-pin simm dm65 edo dram 60ns 72-pin simm 32mb
    Text: NOT RECOMMENDED FOR NEW DESIGNS 4, 8 MEG x 36 ECC-OPTIMIZED DRAM SIMMs DRAM MODULE MT9D436 X MT18D836 X For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/datasheets FEATURES PIN ASSIGNMENT Front View 72-Pin SIMM 4 Meg x 36 (shown)


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    PDF MT9D436 MT18D836 72-Pin 72pin, 048-cycle MARKI133 edo dram 50ns 72-pin simm edo dram 60ns 72-pin simm dm65 edo dram 60ns 72-pin simm 32mb

    MITSUBISHI GATE ARRAY

    Abstract: M5M54R08AJ-12
    Text: MITSUBISHI LSIs 2000.6.22 Ver.E M5M54R08AJ-12 Notice: This is not a final specification. Some parametric limits are subject to change 4194304-BIT 524288-WORD BY 8-BIT CMOS STATIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M5M54R08AJ is a family of 524288-word by 8-bit


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    PDF M5M54R08AJ-12 4194304-BIT 524288-WORD M5M54R08AJ MITSUBISHI GATE ARRAY M5M54R08AJ-12

    D0028

    Abstract: No abstract text available
    Text: PIN CONFIGURATIONS –IN A 2 +IN A 3 TOP VIEW V– 4 Not to Scale OUT A 5 NC +IN A 3 OP262 TOP VIEW V– 4 (Not to Scale) 8 V+ 7 OUT B 6 –IN B 5 +IN B 00288-003 OUT A 1 Portable instrumentation Sampling ADC amplifier Wireless LANs Direct access arrangement


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    PDF OP162/OP262/OP462 OP162 OP262 RU-14 RU-14 D00288-0-5/12 D0028

    32P0K

    Abstract: M5M512R88DJ-10 M5M512R88DJ-12 M5M512R88DJ-15
    Text: MITSUBISHI LSIs 1998.6.18 Ver.A M5M512R88DJ-10,-12,-15 PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change 1048576-BIT 131072-WORD BY 8-BIT CMOS STATIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M5M512R88DJ is a family of 131072-word by 8-bit


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    PDF M5M512R88DJ-10 1048576-BIT 131072-WORD M5M512R88DJ M5M512R88DJ-10 M5M512R88DJ-12 32P0K M5M512R88DJ-12 M5M512R88DJ-15

    Untitled

    Abstract: No abstract text available
    Text: MITSUBISHI LSIs 2001.5.17 Ver.F Notice: This is not a final specification. Some parametric limits are subject to change M5M54R08AJ,TP-10,-12 4194304-BIT 524288-WORD BY 8-BIT CMOS STATIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M5M54R08A is a family of 524288-word by 8-bit


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    PDF M5M54R08AJ TP-10 4194304-BIT 524288-WORD M5M54R08A TP-10 TP-12

    MITSUBISHI GATE ARRAY

    Abstract: No abstract text available
    Text: MITSUBISHI LSIs 2002.10.15 Ver.G Notice: This is not a final specification. Some parametric limits are subject to change M5M54R08AJ,TP-10,-12 4194304-BIT 524288-WORD BY 8-BIT CMOS STATIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M5M54R08A is a family of 524288-word by 8-bit


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    PDF M5M54R08AJ TP-10 4194304-BIT 524288-WORD M5M54R08A TP-10 TP-12 MITSUBISHI GATE ARRAY

    10 Bit Shift Register

    Abstract: Buffer Amplifiers M62342P
    Text: MITSUBISHI <STD. LINEAR ICs> PRELIMINARY M62342P,FP Notice:This is not a final specification. Some parametric limits are subiect to change. 8-BIT 2CH D-A CONVERTER WITH BUFFER AMPLIFIERS GENERAL DESCRIPTION PIN CONFIGURATION TOP VIEW The M62342P,FP is a CMOS 2 channel D-A converter


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    PDF M62342P M62342 10 Bit Shift Register Buffer Amplifiers

    Buffer Amplifiers

    Abstract: M62343P 10 Bit Shift Register
    Text: MITSUBISHI <STD. LINEAR ICs> PRELIMINARY M62343P,FP Notice:This is not a final specification. Some parametric limits are subiect to change. 8-BIT 3CH D-A CONVERTER WITH BUFFER AMPLIFIERS GENERAL DESCRIPTION PIN CONFIGURATION TOP VIEW The M62343P,FP is a CMOS 3 channel D-A converter


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    PDF M62343P M62343 10capacitor Buffer Amplifiers 10 Bit Shift Register

    524,288 x 8 bit

    Abstract: M5M54R08AJ-10 M5M54R08AJ-12 M5M54R08AJ-15 524,288
    Text: MITSUBISHI LSIs 1998.11.30 Ver.B M5M54R08AJ-10,-12,-15 PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change 4194304-BIT 524288-WORD BY 8-BIT CMOS STATIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M5M54R08AJ is a family of 524288-word by 8-bit


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    PDF M5M54R08AJ-10 4194304-BIT 524288-WORD M5M54R08AJ 524,288 x 8 bit M5M54R08AJ-12 M5M54R08AJ-15 524,288

    2716 eeprom

    Abstract: DS1220Y-200 DALLAS DS1220Y DS1220Y-100 DS1220Y-100IND DS1220Y-120 DS1220Y-150 DS1220Y-200 DS1220Y-200IND
    Text: NOT RECOMMENDED FOR NEW DESIGNS DS1220Y 16k Nonvolatile SRAM www.maxim-ic.com FEATURES PIN ASSIGNMENT 10 years minimum data retention in the absence of external power Data is automatically protected during power loss Directly replaces 2k x 8 volatile static RAM


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    PDF DS1220Y 24-pin 2716 eeprom DS1220Y-200 DALLAS DS1220Y DS1220Y-100 DS1220Y-100IND DS1220Y-120 DS1220Y-150 DS1220Y-200 DS1220Y-200IND

    Untitled

    Abstract: No abstract text available
    Text: FEATURES PIN CONFIGURATIONS ADA4850-1 POWER DOWN 1 8 +VS NC 2 7 OUTPUT –IN 3 6 NC +IN 4 5 –VS NOTES 1. EXPOSED PAD CAN BE CONNECTED TO GND, OR LEFT FLOATING. 2. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. 05320-106 Ultralow power-down current: 150 nA/amplifier maximum


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    PDF ADA4850-1 16-Lead CP-16-3 ADA4850-1/ADA4850-2

    Untitled

    Abstract: No abstract text available
    Text: 32Mx72 bits DDR2 SDRAM Registered DIMM HYMP232R72 L 8 Revision History No. 0.1 0.2 History Draft Date Defined Target Spec. Feb. 2004 Added Pin Capacitance Spec. & IDD Spec. Apr. 2004 Corrected Pin assignment table Nov. 2004 Remark This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any


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    PDF 32Mx72 HYMP232R72 240-pin 32Mx8 60-Lefacturing

    EPM5192

    Abstract: EPM5192A J-Lead, QFP ceramic 100-Pin Package Pin-Out Diagram A1176 d1072 K66-1 EPM5192-1
    Text: EPM5192 EPLD Features 11 • ■ ■ ■ Figure 20. EPM5192 Package Pin-Out Diagrams Package outlines not drawn to scale. See Tables 8 and 9 in this data sheet fo r pin-out information. Windows in ceramic packages only. 90005005 22 £ So 2 2 cu 5 ooaa o nnnnnnnnnnnnnnn


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    PDF EPM5192 84-pin 100-pin 000H2SÃ EPM5192A J-Lead, QFP ceramic 100-Pin Package Pin-Out Diagram A1176 d1072 K66-1 EPM5192-1

    Untitled

    Abstract: No abstract text available
    Text: EPM 7128 E P LD □ □ □ Information □ □ Figure 21. EPM7128 Package Pin-Out Diagrams Package outlines not drawn to scale. See Tables 7 and 8 in this data sheet for pin-out information. o q o q z q q q nnnnnnn nn nn nn nn nn nn nn Pin 1 I/O c I □ I/O


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    PDF EPM7128

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY M IC R O N 512K WIDE DRAM MT4C8512/3 L WIDE DRAM X 8 512K x 8 DRAM LOW POWER, EXTENDED REFRESH FEATURES PIN ASSIGNMENT Top View OPTIONS • M ASKED W RITE Not available Available • Packages Plastic SOJ (400 mil) Plastic TSOP (400 mil) Plastic ZIP (375 mil)


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    PDF MT4C8512/3 28-Pin

    18S44

    Abstract: 524288X16
    Text: TMS29LF800T, TMS29LF800B 1048576 BY 8-BIT/524288 BY 16-BIT FLASH MEMORIES Erase Suspend/Resume - Supports Reading Data From, or Programming Data to, a Sector Not Being Erased Hardware-Reset Pin Initializes the Internal-State Machine to the Read Operation Package Options


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    PDF TMS29LF800T, TMS29LF800B 8-BIT/524288 16-BIT SMJS828B 16K-Byte/One 32K-Byte/16K-Word 64K-Byte/32K-Word 18S44 524288X16