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    3M 3M-8979-48MMX12--25-BLK

    TAPE DUCT BLUE 1.89"X12"
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    Ham-Let Group 766L-SS-18MMX1/2

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    Ham-Let Group 768LSS18MMX1/2

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    Murata Manufacturing Co Ltd MGJ2D242005SC

    Isolated DC/DC Converters - Through Hole 2W 24-20VIN 5VOUT DC/DC
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    TTI MGJ2D242005SC Tube 4,980 1
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    Murata Manufacturing Co Ltd NMJ0515SC

    Isolated DC/DC Converters - Through Hole 1W 5-15V SIP 5.2KV DC/DC
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    TTI NMJ0515SC Tube 1,395 1
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    8MMX12 Datasheets Context Search

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    Untitled

    Abstract: No abstract text available
    Text: ESMT M14D5121632A 2H Operation Temperature Condition (TC) -40°C~95°C DDR II SDRAM 8M x 16 Bit x 4 Banks DDR II SDRAM Features z JEDEC Standard z VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V z VDD = 1.75V ~ 1.9V, VDDQ = 1.75V ~ 1.9V (for speed grade -1.8) z


    Original     		PDF M14D5121632A

    M14D1G166

    Abstract: m14d1g M14D1G1664A m14d1g16 DDRII esmt
    Text: ESMT M14D1G1664A 2D 7DDR II SDRAM 8M x 16 Bit x 8 Banks DDR II SDRAM Features  JEDEC Standard  VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V  Internal pipelined double-data-rate architecture; two data access per clock cycle  Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D1G1664A M14D1G166 m14d1g M14D1G1664A m14d1g16 DDRII esmt

    Untitled

    Abstract: No abstract text available
    Text: 256Mb: x4, x8, x16 DDR2 SDRAM DDR2 SDRAM MT47H64M4 – 16 MEG X 4 X 4 MT47H32M8 – 8 MEG X 8 X 4 MT47H16M16 – 4 MEG X 16 X 4 For the latest data sheet, please refer to the Micron Web site: http://www.micron.com/products/dram/ddr2sdram/ Features • •


    Original     		PDF 256Mb: 18-compatible) 192-cycle MT47H64M4 MT47H32M8 MT47H16M16 09005aef80b12a05

    Untitled

    Abstract: No abstract text available
    Text: ESM T M14D2561616A DDR II SDRAM 4M x 16 Bit x 4 Banks DDR II SDRAM Features JEDEC Standard VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V Internal pipelined double-data-rate architecture; two data access per clock cycle Bi-directional differential data strobe DQS, DQS ; DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D2561616A

    siba

    Abstract: 2077132 siba nh gl Part DC92-01021B installation diagram SIBA FUSE FF 500 mA SIBA 50 A Ultra Rapid 50 201 06 Siba 20 209 20
    Text: copyright 2014 Maryland Metrics/SIBA Sicherungen-Bau GmbH 201 are available from: MARYLAND METRICS Our protection. Your benefit. SIBA Products are available from: MARYLAND METRICS P.O.Box 261 Owings Mills, MD 21117 USA phones: 410 358-3130 (800) 638-1830 faxes: (410) 358-3142 (800) 872-9329


    Original     		PDF R367-â R367-1100525 R367-' siba 2077132 siba nh gl Part DC92-01021B installation diagram SIBA FUSE FF 500 mA SIBA 50 A Ultra Rapid 50 201 06 Siba 20 209 20

    M14D5121632A

    Abstract: No abstract text available
    Text: ESMT M14D5121632A 2K DDR II SDRAM 8M x 16 Bit x 4 Banks DDR II SDRAM Features  JEDEC Standard  VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V  Internal pipelined double-data-rate architecture; two data access per clock cycle  Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D5121632A M14D5121632A

    M14D128168A

    Abstract: 18BB
    Text: ESMT DDR II SDRAM M14D128168A 2M 2M x 16 Bit x 4 Banks DDR II SDRAM Features  JEDEC Standard  VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V  Internal pipelined double-data-rate architecture; two data access per clock cycle  Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D128168A M14D128168A 18BB

    Untitled

    Abstract: No abstract text available
    Text: ESMT Preliminary M14D5121632A (2K) DDR II SDRAM 8M x 16 Bit x 4 Banks DDR II SDRAM Features  JEDEC Standard  VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V  Internal pipelined double-data-rate architecture; two data access per clock cycle  Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D5121632A

    Untitled

    Abstract: No abstract text available
    Text: 256Mb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H64M4 – 16 Meg x 4 x 4 banks MT47H32M8 – 8 Meg x 8 x 4 banks MT47H16M16 – 4 Meg x 16 x 4 banks For the latest data sheet, please refer to the Micron Web site: http://www.micron.com/ddr2 Features • VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V excluding 37V ; -37V VDD = +1.9V ±0.1V, VDDQ = +1.9V ±0.1V


    Original     		PDF 256Mb: MT47H64M4 MT47H32M8 MT47H16M16 18-compatible) 09005aef8117c187, 09005aef80b12a05 256MbDDR2

    Untitled

    Abstract: No abstract text available
    Text: 256Mb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H64M4 – 16 Meg x 4 x 4 banks MT47H32M8 – 8 Meg x 8 x 4 banks MT47H16M16 – 4 Meg x 16 x 4 banks For the latest data sheet, please refer to the Micron Web site: http://www.micron.com/ddr2 Features • VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V excluding 37V ; -37V VDD = +1.9V ±0.1V, VDDQ = +1.9V ±0.1V


    Original     		PDF 256Mb: MT47H64M4 MT47H32M8 MT47H16M16 18-compatible) 09005aef8117c187, 09005aef80b12a05 256MbDDR2

    Untitled

    Abstract: No abstract text available
    Text: ESMT DDR II SDRAM M14D2561616A 4M x 16 Bit x 4 Banks DDR II SDRAM Features z JEDEC Standard z VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V z Internal pipelined double-data-rate architecture; two data access per clock cycle z Bi-directional differential data strobe DQS, DQS ; DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D2561616A

    Untitled

    Abstract: No abstract text available
    Text: ESM T M14D1G1664A 2D 7DDR II SDRAM 8M x 16 Bit x 8 Banks DDR II SDRAM Features  JEDEC Standard  VDD = 1.8V  Internal pipelined double-data-rate architecture; two data access per clock cycle  Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D1G1664A

    Untitled

    Abstract: No abstract text available
    Text: 256Mb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H64M4 – 16 Meg x 4 x 4 banks MT47H32M8 – 8 Meg x 8 x 4 banks MT47H16M16 – 4 Meg x 16 x 4 banks For the latest data sheet, please refer to the Micron Web site: http://www.micron.com/ddr2 Features • VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V excluding 37V ; -37V VDD = +1.9V ±0.1V, VDDQ = +1.9V ±0.1V


    Original     		PDF 256Mb: MT47H64M4 MT47H32M8 MT47H16M16 18-compatible) 09005aef8117c187, 09005aef80b12a05 256MbDDR2

    M14D5121632A

    Abstract: M14D512
    Text: ESMT Preliminary M14D5121632A (2T) DDR II SDRAM 8M x 16 Bit x 4 Banks DDR II SDRAM Features z JEDEC Standard z VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V z Internal pipelined double-data-rate architecture; two data access per clock cycle z Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D5121632A M14D5121632A M14D512

    Untitled

    Abstract: No abstract text available
    Text: ESM T M14D5121632A 2H Automotive Grade DDR II SDRAM 8M x 16 Bit x 4 Banks DDR II SDRAM Features JEDEC Standard VDD = 1.8V 0.1V, VDDQ = 1.8V 0.1V Internal pipelined double-data-rate architecture; two data access per clock cycle Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D5121632A

    Untitled

    Abstract: No abstract text available
    Text: ESM T M14D128168A 2M DDR II SDRAM 2M x 16 Bit x 4 Banks DDR II SDRAM Features  JEDEC Standard  VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V  Internal pipelined double-data-rate architecture; two data access per clock cycle  Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D128168A

    230v 5v 2A 10W schematic

    Abstract: EER28L 230v ac 5v adapter circuit schematic Nippon Chemi-con cap 2N3906 SMD 2A power supply dvd recorder LG DVD pickup assembly NIPPON CHEMI-CON axial capacitors power supply DVD schematic diagram EER28L bobbin
    Text: Design Example Report Title 17W 25W peak DVD Recorder Power Supply using TOP245P Input: 90 – 265 VAC Output: 3.4V/2.55A, 5.1V/1.5A, 5.1Vsb/0.85A, Specification 12V/2.8A, 12Vsb/0.4A, -5.3V/0.3A, -5.3Vsb/20mA, -22Vsb/10mA, +33Vsb/2mA, 3.5V VFD/165mA Application


    Original     		PDF OP245P 12Vsb/0 3Vsb/20mA, -22Vsb/10mA, 33Vsb/2mA, VFD/165mA DER-18 230v 5v 2A 10W schematic EER28L 230v ac 5v adapter circuit schematic Nippon Chemi-con cap 2N3906 SMD 2A power supply dvd recorder LG DVD pickup assembly NIPPON CHEMI-CON axial capacitors power supply DVD schematic diagram EER28L bobbin

    Untitled

    Abstract: No abstract text available
    Text: ESMT M14D5121632A 2H DDR II SDRAM 8M x 16 Bit x 4 Banks DDR II SDRAM Features z JEDEC Standard z VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V z VDD = 1.75V ~ 1.9V, VDDQ = 1.75V ~ 1.9V (for speed grade -1.8) z Internal pipelined double-data-rate architecture; two data access per clock cycle


    Original     		PDF M14D5121632A

    M14D256

    Abstract: No abstract text available
    Text: ESMT Preliminary M14D2561616A (2L) DDR II SDRAM 4M x 16 Bit x 4 Banks DDR II SDRAM Features z JEDEC Standard z VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V z Internal pipelined double-data-rate architecture; two data access per clock cycle z Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D2561616A M14D256

    Untitled

    Abstract: No abstract text available
    Text: ESMT M14D2561616A 2E DDR II SDRAM 4M x 16 Bit x 4 Banks DDR II SDRAM Features z JEDEC Standard z VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V z Internal pipelined double-data-rate architecture; two data access per clock cycle z Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.


    Original     		PDF M14D2561616A

    84 FBGA outline

    Abstract: DDR2 x32 5 pin cmos operational amplifier z X6 BP 109 transistor T6N 700 DDR2 SDRAM Meg x 4 x 9 banks 0-30v power DDR2 SDRAM sstl_18 84 FBGA ccd ck
    Text: 256Mb: x4, x8, x16 DDR2 SDRAM Features DDR2 SDRAM MT47H64M4 – 16 Meg x 4 x 4 MT47H32M8 – 8 Meg x 8 x 4 MT47H16M16 – 4 Meg x 16 x 4 For the latest data sheet, please refer to the Micron Web site: http://www.micron.com/ddr2 Features • VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V excluding -37V ; -37V VDD = +1.9V ±0.1V, VDDQ = +1.9V


    Original     		PDF 256Mb: MT47H64M4 MT47H32M8 MT47H16M16 18-compatible) 09005aef8117c187, 09005aef80b12a05 256MbDDR2 84 FBGA outline DDR2 x32 5 pin cmos operational amplifier z X6 BP 109 transistor T6N 700 DDR2 SDRAM Meg x 4 x 9 banks 0-30v power DDR2 SDRAM sstl_18 84 FBGA ccd ck

    M14D2561616A

    Abstract: DDR-533
    Text: ESMT M14D2561616A Operation Temperature Condition TC -40°C~95°C DDR II SDRAM 4M x 16 Bit x 4 Banks DDR II SDRAM Features z JEDEC Standard z VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V z Internal pipelined double-data-rate architecture; two data access per clock cycle


    Original     		PDF M14D2561616A M14D2561616A DDR-533

    Untitled

    Abstract: No abstract text available
    Text: 256Mb: x4, x8, x16 DDR2 SDRAM DDR2 SDRAM MT47H64M4 – 16 MEG x 4 x 4 MT47H32M8 – 8 MEG x 8 x 4 MT47H16M16 – 4 MEG x 16 x 4 For the latest data sheet, please refer to the Micron Web site: http://www.micron.com/ddr2 Features • VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V excluding 37V ; -37V VDD = +1.9V ±0.1V, VDDQ = +1.9V ±0.1V


    Original     		PDF 256Mb: 18-compatible) 192-cycle MT47H64M4 MT47H32M8 09005aef8117c187, 09005aef80b12a05 256MbDDR2

    Untitled

    Abstract: No abstract text available
    Text: 256Mb: x4, x8, x16 DDR2 SDRAM DDR2 SDRAM MT47H64M4–16 MEG X 4 X 4 MT47H32M8–8 MEG X 8 X 4 MT47H16M16–4 MEG X 16 X 4 For the latest data sheet, please refer to the Micron Web site: http://www.micron.com/datasheets Features • • • • • • •


    Original     		PDF 256Mb: 18-compatible) 192-cycle 16M16 MT47H64M4 MT47H32M8 MT47H16M16 09005aef80b12a05