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    SiByte

    Abstract: BCM1125H ocdemon BCM112X
    Text: BCM91125F EVALUATION BOARD FOR BCM1125H PROCESSOR FEATURES • BCM1125H System on a Chip SOC • 64-bit MIPS processor SOC running at 600 MHz • 32-KB instruction and 32-KB data cache • 256K L2 cache • Soldered-down 128-MB DDR SDRAM • 128-Mb FLASH PROM, reprogrammable from firmware, or


    Original
    BCM91125F BCM1125H 64-bit 32-KB 128-MB 32-bit, 33/66-MHz, SiByte ocdemon BCM112X PDF