7655a
Abstract: CD2481 CL-CD2231 CL-CD2401 CL-CD2431 CL-CD2481 3C3EW CD240 BW-190
Text: CL-CD2481 Data Book FEATURES • Four full-duplex multi-protocol channels, each running up to 230.4 kbps with 60-MHz clock Programmable Four-Channel ■ Microcode downloadable to on-chip storage supports various asynchronous and synchronous protocols on
|
Original
|
PDF
|
CL-CD2481
60-MHz
32-bit
16-bit
7655a
CD2481
CL-CD2231
CL-CD2401
CL-CD2431
CL-CD2481
3C3EW
CD240
BW-190
|
RFC-1055
Abstract: CL-CD2231 CL-CD2401 CL-CD2431 CL-CD2481 PQFP-100 Package footprint
Text: CL-CD2481 Product Bulletin FEATURES • Four full-duplex multi-protocol channels, each running up to 230.4 kbps with 60-MHz clock Programmable Four-Channel Communications Controller ■ Microcode downloadable to on-chip storage supports various asynchronous and synchronous protocols on
|
Original
|
PDF
|
CL-CD2481
60-MHz
32-bit
16-bit
RFC-1055
CL-CD2231
CL-CD2401
CL-CD2431
CL-CD2481
PQFP-100 Package footprint
|
25C026
Abstract: CL-CD2481 ASYNC32
Text: CL-CD2481 Data Book FEATURES • Four full-duplex multi-protocol channels, each running up to 230.4 kbps with 60-MHz clock Programmable Four-Channel ■ Microcode downloadable to on-chip storage supports various asynchronous and synchronous protocols on
|
Original
|
PDF
|
CL-CD2481
60-MHz
32-bit
16-bit
CL-CD2481
25C026
ASYNC32
|
chmd
Abstract: CD2231 CD2401 CD2431 CD2481 CL-CD2481 rfc bb 204
Text: CD2481 Programmable Four-Channel Communications Controller Datasheet The CD2481 is a four-channel synchronous/asynchronous communications controller specifically designed to reduce host-system processing overhead and increase efficiency in a wide variety of communications applications. A special member of the CD24X1 family, the
|
Original
|
PDF
|
CD2481
CD2481
CD24X1
100-pin
chmd
CD2231
CD2401
CD2431
CL-CD2481
rfc bb 204
|
GT1 X02
Abstract: CD2401 80X86 CD2231 CD2431 CD2481 CL-CD2401
Text: CD2401 Multi-Protocol Communications Controller Datasheet The CD2401 is a four-channel synchronous/asynchronous communications controller, specifically designed to reduce host-system processing overhead and increase efficiency in a wide variety of communications applications. The CD2401 is available in a 100-pin MQFP
|
Original
|
PDF
|
CD2401
CD2401
100-pin
GT1 X02
80X86
CD2231
CD2431
CD2481
CL-CD2401
|
STK 5481 DATA
Abstract: GT1 X02 80X86 CD2231 CD2401 CL-CD2231 SCD223110QCD w9920 ta 8653 n D287B
Text: CD2231 Intelligent Two-Channel LAN and WAN Communications Controller Datasheet The CD2231 is a two-channel multi-protocol synchronous/asynchronous communications controller specifically designed to reduce host-system processing overhead and increase efficiency in a wide variety of communications applications. The CD2231 is packaged in a 100pin MQFP, and offers eight clock/modem pins per channel. The device has two fully
|
Original
|
PDF
|
CD2231
CD2231
100pin
35-MHz
STK 5481 DATA
GT1 X02
80X86
CD2401
CL-CD2231
SCD223110QCD
w9920
ta 8653 n
D287B
|
RFC1662
Abstract: RFC-1662 iso 3309 SCD240110QCM CD2401 intel DMA controller scd243110qcd hdlc IN SDLC PROTOCOL CD2231
Text: product brief Intel WAN Controllers Product Highlights • Multi-protocol support: async, sync HDLC/SDLC high-level data link control/ synchronous data link control ■ On-chip 32-bit address, 16-bit data, doublebuffered DMA controller for each transmitter
|
Original
|
PDF
|
32-bit
16-bit
CD2231,
CD2401,
CD2431,
CD2481
USA/0501/
K/IL10740C
RFC1662
RFC-1662
iso 3309
SCD240110QCM
CD2401
intel DMA controller
scd243110qcd
hdlc
IN SDLC PROTOCOL
CD2231
|
Untitled
Abstract: No abstract text available
Text: CL-CD2481 rCIRRUS LOGIC Programmable Communications Controller ;5?$ •s-s$;.^:5r^î: ¿-s-*:* j't - s :. ¿ ir s ii #:;.•« s Before beginning any new design with this device, please contact Cirrus Logic Inc. for the latest errata information. See the back cover of this document for sales office locations and
|
OCR Scan
|
PDF
|
CL-CD2481
|
CLCD2481
Abstract: No abstract text available
Text: CL-CD2481 Programmable Communications Controller 6. rCIRRUS LOGIC PROGRAMMING EXAMPLES This section provides some examples of CL-CD2481 programming. Included are examples of Global and Per-Channel initialization, and two interrupt service routines. The code was written in Borland Turbo C+.
|
OCR Scan
|
PDF
|
CL-CD2481
CL-CD2481
com/pub/support/sio/cd2481/EvalBdv2
com/pub/support/sio/cd2481/Firmware
CLCD2481
|
Untitled
Abstract: No abstract text available
Text: CL-CD2481 Programmable Communications Controller rCIRRUS LOGIC 7. DETAILED REGISTER DESCRIPTIONS 7.1 Global Registers 7.1.1 Global Firmware Revision Code Register GFRCR Intel Hex Address: x’82 Motorola Hex Address: x’81 Register Name: GFRCR Register Description: Global Firmware Revision Code Register
|
OCR Scan
|
PDF
|
CL-CD2481
CL-CD2481.
CL-CD2481
|
stk 142 150
Abstract: No abstract text available
Text: CL-CD2481 Programmable Communications Controller CIRRUS LOGIC INDEX abbreviations 7 absolute maximum ratings 200 AC electrical characteristics bus arbitration 201 DMA read 201 DMA write 201 host read/write 202 interrupt acknowledge 202 acronyms 7 Addressing mode 99
|
OCR Scan
|
PDF
|
CL-CD2481
stk 142 150
|
MSVR
Abstract: No abstract text available
Text: CL-CD2481 Programmable Communications Controller FCIRRUS LOGIC PIN INFORMATION Pin Diagram — CL-CD2481 î g n £ s ß e s a e e e g s s s s s s a .•□nnnnnnnnnnnnnnnnnnn / RXCIN[3] ~ TXCIN[3] d DSR*[0]C C T S *[0 ][I TXCOUT/DTB*[0]C RTS“[0] C D S R *[1][I
|
OCR Scan
|
PDF
|
CL-CD2481
MSVR
|
Untitled
Abstract: No abstract text available
Text: CL-CD2481 Programmable Communications Controller ^CIRRUS LOGIC 10. ORDERING INFORMATION EXAMPLE CL-CD2481 - 1 0 Q C - B T Cirrus Logic, Inc. =n— TTT I Revision ' Temperature Range: C = Commercial Communications, D ata—I Part number Internal reference number —
|
OCR Scan
|
PDF
|
CL-CD2481
CL-CD2481
|
Untitled
Abstract: No abstract text available
Text: CL-CD2481 Programmable Communications Controller -, i -it i ht svi* : ; 3 s. 3 =>• î ü* =5 =:• =i. =: =:• c: ; : c ’'CIRRUS LOGIC <•.> ? =; . s 9. PACKAGE SPECIFICATIONS 0.65 0.026 0.95 (0.037) 2.57(0.101) 2.87(0.113)' 1.60(0.063) REF I JrJtl
|
OCR Scan
|
PDF
|
CL-CD2481
|
|
Untitled
Abstract: No abstract text available
Text: CL-CD2481 Programmable Communications Controller rCIRRUS LOGIC T h e s e p r e lim in a r y c h a r a c te r is tic s and tim in g s p e c ific a tio n s a p p ly th e re v is io n ' B ’ CL-CD2481 devices only. The values contained herein are based on prelim inary inform ation
|
OCR Scan
|
PDF
|
CL-CD2481
CL-CD2481
CL-CD24S1
|
RFC-1055
Abstract: RRUS 32 47k ohm resistor CLCD2481 4,7k ohm resistor RFC1055
Text: CL-CD2481 'CIRRUS LOGIC Advance Data Book FEATURES • Four full-duplex multi-protocol channels, each running up to 134.4 kbits/second with 35MHz dock ■ Supports various asynchronous and synchronous protocols on all channels depending on the microcode
|
OCR Scan
|
PDF
|
CL-CD2481
35MHz
32-bit
16-bit
CL-CD2481
100-pin
CL-CD24x1
CL-CD24x1d
RFC-1055
RRUS 32
47k ohm resistor
CLCD2481
4,7k ohm resistor
RFC1055
|
Untitled
Abstract: No abstract text available
Text: CL-CD2481 Programmable Communications Controller r CIRRUS LOGIC Acronyms CONVENTIONS Acronym Abbreviations Units of measure Symbol °C IS microsecond (1,000 nanoseconds Hz hertz (cycle per second) Kbit kilobit (1,024 bits) Kbyte kbytes/second AC alternating current
|
OCR Scan
|
PDF
|
CL-CD2481
|
Untitled
Abstract: No abstract text available
Text: CL-CD2481 Programmable Communications Controller 'CIRRUS LOGIC 3. FUNCTIONAL DESCRIPTION 3.1 Host Interface word transfers are supported in each of the Bus Slave and DMA Bus Master modes. Figure 3-1 and Figure 3-2 show the signals involved in these trans
|
OCR Scan
|
PDF
|
CL-CD2481
CL-CD2481
RS-232-C
RS-232-C,
CCITT1988
|
557 timer connections
Abstract: 555 timer logic diagram BUS60
Text: CL-CD2481 Programmable Communications Controller rCiRRUS LOGIC Before beginning any new design with this device, please contact Cirrus Logic Inc. for the latest errata information. See the back cover of this document for sales office locations and phone numbers. These characteristics and timing specifications apply revision ‘B’ or later
|
OCR Scan
|
PDF
|
CL-CD2481
35MHz
557 timer connections
555 timer logic diagram
BUS60
|
Untitled
Abstract: No abstract text available
Text: CL-CD2481 DataBook 'CIRRUS LOGIC FEATURES • Four full-duplex multi-protocol channels, each running up to 230.4 kbps with 60-MHz clock Programmable Four-Channel ■ Microcode downloadable to on-chip storage supports various asynchronous and synchronous protocols on
|
OCR Scan
|
PDF
|
CL-CD2481
60-MHz
32-bit
16-bit
|
mot3
Abstract: No abstract text available
Text: CL-CD2481 'CIRRUS LOGIC Programmable Communications Controller :.s:s .ÿ » ¡¿ "y - iïvï ïut :. . v ' i i r j S Æ ' ï : ? :.• 2. REGISTER TABLES Registers in the CL-CD2481 are either Global or Per-Channel. The column ‘Address mode’ in the memory
|
OCR Scan
|
PDF
|
CL-CD2481
CL-CD2481
mot3
|
MTCR
Abstract: No abstract text available
Text: CL-CD2481 Programmable Communications Controller rClRRUS LOGIC 4. MICROCODE DOWNLOAD The CL-CD2481 has no on-chip protocol processing code; the ROM included on-chip performs only boot time tasks such as initializing hardware resources and clearing internal RAM-based register storage loca
|
OCR Scan
|
PDF
|
CL-CD2481
CL-CD2481
20D08
208F0
0D008
228F0
20C30
22D10
0200F
MTCR
|