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    CN8237 Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CN8237EBG Mindspeed Technologies ATM Traffic Management, ATM OC12 Service SAR Plus with xBR Traffic Management Original PDF
    CN8237EBGB Mindspeed Technologies ATM SAR, 622Mbps Controller with CBR, ABR, UBR, GFR, VBR Supported Original PDF
    CN8237EBGB Mindspeed Technologies ATM OC-12 ServiceSAR Plus with xBR Traffic Management Original PDF

    CN8237 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    SA1381

    Abstract: SS823 RDATA13 3RA61 AC21T n25h VSS1490 bwd9 HAD44 HAD48
    Text: A B C D REVISIONS ZONE LTR CN8237/CX29704 PCB:BT01-D255-011 A DESCRIPTION INITIAL APPROVED DATE RELEASE 1 1 DL1 DELAYLINE 2.5NS 1 2 U7 3 CN8237 SEGMENTATION SCLK0 R124 18 DL2 B3SCLK0 A3SCLK1 R116 18 DELAYLINE 2.5NS POWER VDD PINS E7, E8, E11, E12, E15, E16


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    PDF CN8237/CX29704 BT01-D255-011 CN8237 BT01-X250 SA1381 SS823 RDATA13 3RA61 AC21T n25h VSS1490 bwd9 HAD44 HAD48

    8237AP

    Abstract: No abstract text available
    Text: 101512A January 25, 2001 CN8237 Application Note: Local Memory Interface Design Details Figure 1 is a simplified drawing of the SAR’s Local Memory interface. This applies to both the RSM and SEG coprocessor’s Local Memory interfaces. The memory used is flow-through ZBT


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    PDF 01512A CN8237 KM718V847T-8) 8237AP

    CN8237EBGB

    Abstract: CX29704 RS8234 RS8235 PCI x1 express PCB dimensions artwork BC 5473
    Text: CN8237 ATM OC-12 ServiceSAR Plus with xBR Traffic Management The CN8237 Service Segmentation and Reassembly ServiceSAR Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA 1 or 2 interface with service-specific functions in a single package for AAL0 and AAL5 operations. The ServiceSAR


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    PDF CN8237 OC-12 CN8237 28237-DSH-001-B CN8237EBGB CX29704 RS8234 RS8235 PCI x1 express PCB dimensions artwork BC 5473

    P41 transistor

    Abstract: P42 transistor
    Text: 500146A June 28, 2001 CN8237 Raw Cell Mode Application Note The SAR may be programmed, on a per VCC basis, to operate in a mode where both ATM Adaptation Layer AAL processing and ATM cell header processing is turned off. This mode of operation is referred to as raw cell mode. The traffic shaping (scheduler) capability within


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    PDF 00146A CN8237 P41 transistor P42 transistor

    PCI x1 express PCB dimensions artwork

    Abstract: 140288 CN8237EBGB CN8236 RS8234 RS8235 RS8254
    Text: CN8237 ATM OC12 ServiceSAR Plus with xBR Traffic Management The CN8237 Service Segmentation and Reassembly ServiceSAR Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA 1 or 2 interface with service-specific functions in a single package for AAL0 and AAL5 operations. The ServiceSAR


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    PDF CN8237 CN8237 PCI x1 express PCB dimensions artwork 140288 CN8237EBGB CN8236 RS8234 RS8235 RS8254

    CPC710

    Abstract: CY7C0852V PCI bridge
    Text: 500122C December 14, 2001 Recommended System Architecture for OC-12/SAR CN8237 Application Note Part 1 The SAR’s PCI bus is the path for data and control flows. Worse case analysis using two cell PDUs shows PCI bus usage at approximately 75%. This means that no other system activity


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    PDF 500122C OC-12/SAR CN8237) CPC710 CY7C0852V PCI bridge

    28237

    Abstract: No abstract text available
    Text: 28237-APP-002-B October 2, 2003 CN8237 OC-12 SAR Performance Application Note In order to achieve OC-12 line rate performance from the CN8237 SAR, the following system parameters MUST be met. PCI Bus • • • • 64 bit 66 MHz Point to point design Target address to data latency nine clock cycles or less SAR read for Segmentation


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    PDF 28237-APP-002-B CN8237 OC-12 Technologi-002-B 28237

    Link Layer Controllers

    Abstract: CX29704
    Text: January 2003 CN8237 EVM Following is a list of documents and files related to the Mindspeed CN8237 EVM. CN8237 EVM documents and related files: The following documents and EVM related files are available for the CN8237 EVM: • CN8237 Viewlogic Symbol 1 • CN8237 Viewlogic Symbol 2


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    PDF CN8237 CN8237/CX29704 Link Layer Controllers CX29704

    140288

    Abstract: CN8237EB
    Text: CN8237 ATM OC12 ServiceSAR Plus with xBR Traffic Management The CN8237 Service Segmentation and Reassembly ServiceSAR Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA 1 or 2 interface with service-specific functions in a single package for AAL0 and AAL5 operations. The ServiceSAR


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    PDF CN8237 CN8237 140288 CN8237EB

    Cx2829

    Abstract: mindspeed command SRCCTL CX29704 CX28296
    Text: CN8237/CX29704 ATM SAR Evaluation Module Users Guide 500089A February 2002 Ordering Information Model Number Package Ambient Temperature Range CN8237 456-pin BGA –40 °C to 85 °C CX29704 27 x 27, 272-Pin PBGA –40 °C to 85 °C Revision History Revision


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    PDF CN8237/CX29704 00089A CN8237 456-pin CX29704 272-Pin Cx2829 mindspeed command SRCCTL CX29704 CX28296

    VCCS protocol

    Abstract: CN8237EBGB VCCS Communication Protocol CN8236 CX29704 RS8234 GR-1248 atm source code
    Text: OC-12 ATM SAR with UTOPIA Level 2 CN8237 ATM OC-12 ServiceSAR Plus with xBR Traffic Management Mindspeed’s CN8237 Service Segmentation and Reassembly ServiceSAR controller integrates ATM terminal functions, PCI bus master and slave > K E Y F E AT U R E S


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    PDF OC-12 CN8237 CN8237 GR-1248 VCCS protocol CN8237EBGB VCCS Communication Protocol CN8236 CX29704 RS8234 GR-1248 atm source code

    CN8237EBGB

    Abstract: CX29704 RS8234 IR remote control transmitter circuit HAD48 SCHH CN8237EB TDA 2827
    Text: CN8237 ATM OC-12 ServiceSAR Plus with xBR Traffic Management The CN8237 Service Segmentation and Reassembly ServiceSAR Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA 1 or 2 interface with service-specific functions in a single package for AAL0 and AAL5 operations. The ServiceSAR


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    PDF CN8237 OC-12 CN8237 28237-DSH-001-C CN8237EBGB CX29704 RS8234 IR remote control transmitter circuit HAD48 SCHH CN8237EB TDA 2827

    2823X-APP-001-A

    Abstract: mindspeed CN8236 APP-001-A application note utopia HRST
    Text: CN8236 and CN8237 UTOPIA Bus Signal Contention When Running SAR as a UTOPIA Slave on a UTOPIA Level 2 Bus Application Note 2823X-APP-001-A September, 2003 2003, Mindspeed Technologies, Inc. All Rights Reserved. Information in this document is provided in connection with Mindspeed Technologies “Mindspeed™” products. These materials are provided


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    PDF CN8236 CN8237 2823X-APP-001-A 50MHz 2823X-APP-001-A mindspeed APP-001-A application note utopia HRST

    Untitled

    Abstract: No abstract text available
    Text: CN8237 ATM ServiceSAR Plus with xBR Traffic Management The CN8237 Service Segmentation and Reassembly ServiceSAR Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA 1 or 2 interface with service-specific functions in a single package for AAL0 and AAL5 operations. The ServiceSAR


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    PDF CN8237 CN8237 00376A OC-12

    I960CA

    Abstract: CN8236 CX28250EVM Bt8223
    Text: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.


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    PDF CN8236 CN8236 28236-DSH-001-B I960CA CX28250EVM Bt8223

    M02142

    Abstract: M02170 M82359 M83241 M83263 M83261 M02172 M21528 M82351 M82506
    Text: Silicon Solutions for Communication Applications Comcerto IP Processing Customer Premise 1000 Family of Low Power Embedded Packet Processors M83263 2 cores @ 650Mhz, VoIP, SMBSoC M83261 2 cores @ 650MHz, VoIP, Sec M83262 2 cores @ 650MHz, SMBSoC M83160 1 core @ 650MHz, Sec


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    PDF M83263 650Mhz, M83261 M83262 M83160 M83251 533MHz, M02142 M02170 M82359 M83241 M83263 M83261 M02172 M21528 M82351 M82506

    cx2829

    Abstract: CX29702
    Text: OptiPHY -F155 STS-3/STM-1 SONET/ SDH ATM/POS Framer Family Data Sheet CX29704 Four STS-3/STM-1 Ports CX29702 Two STS-3/STM-1 Ports CX29701 One STS-3/STM-1 Port 29704-DSH-001-D February 2005 Ordering Information Model Number Manufacturing Part Number Package


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    PDF OptiPHYTM-F155 CX29704 CX29702 CX29701 29704-DSH-001-D CX29701 CX29704-14 CX29702-14 cx2829

    Untitled

    Abstract: No abstract text available
    Text: OptiPHY -F155 STS-3/STM-1 SONET/ SDH ATM/POS Framer Family Data Sheet CX29704 Four STS-3/STM-1 Ports CX29702 Two STS-3/STM-1 Ports CX29701 One STS-3/STM-1 Port 29704-DSH-001-F March 2006 Ordering Information Manufacturing Part Number Model Number Package


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    PDF OptiPHYTM-F155 CX29704 CX29702 CX29701 29704-DSH-001-F CX29704-14 272-Pin CX29704G-14*

    ATM-18

    Abstract: ATM-5 DG 7-119 ATM machine using microprocessor 0x760 GSM modem M10 icp multiplexer 24 pin SINGLE POINT load cell C3 CLASS CX28225 CX28229
    Text: CX28224/5/9 Inverse Multiplexing for ATM IMA Family Data Sheet 28229-DSH-001-B January 2003 Ordering Information Model Number Manufacturing Part Number Product Revision Package Operating Temperature CX28224 28224-14 D 256-pin, 17 mm BGA –40 °C to 85 °C


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    PDF CX28224/5/9 28229-DSH-001-B CX28224 256-pin, CX28225 CX28229 CX28224/5/9 ATM-18 ATM-5 DG 7-119 ATM machine using microprocessor 0x760 GSM modem M10 icp multiplexer 24 pin SINGLE POINT load cell C3 CLASS CX28225 CX28229

    Cx2829

    Abstract: TXC24 0x46-RXLIN "network interface cards" Trec Part Numbering System GR
    Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and


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    PDF CX28250 53-byte CX28250 500035D Cx2829 TXC24 0x46-RXLIN "network interface cards" Trec Part Numbering System GR

    Untitled

    Abstract: No abstract text available
    Text: 101335P1 November 15, 2000 Board Design Principles for Conexant Semiconductors Application Note This paper is intended to be short treatise on circuit board layout techniques for today’s designer and is focused primarily on Conexant’s silicon. Most books on the subject, and indeed most


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    PDF 101335P1

    CX2829

    Abstract: J119 J512 A1020 transistor a1633 d705 led CX28250-23 CX28250-26 GR-253-CORE 24V to 15V REGULATOR IC
    Text: CX28250 ATM Physical Interface PHY Devices The CX28250 is an ATM-SONET Physical Layer (PHY) device with an integrated, PLL clock and data recovery (CDR) circuit. This device has optimized SONET framer functions for mapping ATM cells to SONET payloads for edge switch applications, and


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    PDF CX28250 CX28250 53-byte TXZ02 28250-DSH-002-A CX2829 J119 J512 A1020 transistor a1633 d705 led CX28250-23 CX28250-26 GR-253-CORE 24V to 15V REGULATOR IC

    Untitled

    Abstract: No abstract text available
    Text: CN8236 ATM ServiceSAR Plus with xBR Traffic Management The CN8236 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA level 1 or 2 interface with service-specific functions in a single package for AAL0, 3/4, and 5 operations.


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    PDF CN8236 CN8236 500372B

    CX29702

    Abstract: No abstract text available
    Text: OptiPHY -F155 STS-3/STM-1 SONET/ SDH ATM/POS Framer Family Data Sheet CX29704 Four STS-3/STM-1 Ports CX29702 Two STS-3/STM-1 Ports CX29701 One STS-3/STM-1 Port 500034C July 2002 Ordering Information Model Number Manufacturing Part Number Package Description


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    PDF OptiPHYTM-F155 CX29704 CX29702 CX29701 500034C CX29704-13 CX29702-13