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Infineon Technologies AG CY7C1480V25-200BZC IC SRAM 72MBIT PARALLEL 165FBGA
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CY7C1480V25 Datasheets (4)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
CY7C1480V25		Cypress Semiconductor	72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM		Original	PDF
CY7C1480V25-167AXC		Cypress Semiconductor	72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM		Original	PDF
CY7C1480V25-200BZC		Cypress Semiconductor	72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V		Original	PDF
CY7C1480V25-200BZC		Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 72MBIT 200MHZ 165FBGA		Original	PDF

CY7C1480V25 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
Untitled Abstract: No abstract text available Text: CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation	Original	PDF	CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 36/4M 18/1M 250-MHz CY7C1480V25, 100-pin
Untitled Abstract: No abstract text available Text: CY7C1480V25 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined Sync SRAM Functional Description[1] Features • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 167 MHz Registered inputs and outputs for pipelined operation	Original	PDF	CY7C1480V25 72-Mbit 36/4M 18/1M CY7C1480V25/CY7C1482V25/CY7C1486V25 18/1M 209-Ball CY7C1482V25
Untitled Abstract: No abstract text available Text: CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation	Original	PDF	CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 36/4M 18/1M 250-MHz 200-MHz 167-MHz CY7C1480V25,
Untitled Abstract: No abstract text available Text: CY7C1480V25 CY7C1482V25 CY7C1486V25 PRELIMINARY 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, 167 MHz • Registered inputs and outputs for pipelined operation	Original	PDF	CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 36/4M 18/1M 250-MHz 200-MHz 167-MHz
CY7C1480V25 Abstract: CY7C1482V25 CY7C1486V25 Text: CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation	Original	PDF	CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 36/4M 18/1M 250-MHz CY7C1480V25, CY7C1482V25 209-Ball CY7C1480V25 CY7C1486V25
CY7C1480V25 Abstract: CY7C1482V25 CY7C1486V25 Text: CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined Sync SRAM Functional Description[1] Features • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 167 MHz Registered inputs and outputs for pipelined operation	Original	PDF	CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 36/4M 18/1M 250-MHz CY7C1480V25, CY7C1482V25 CY7C1480V25 CY7C1486V25
Untitled Abstract: No abstract text available Text: THIS SPEC IS OBSOLETE Spec No: 38-05282 Spec Title: �CY7C1480V25 72-MBIT 2M X 36/4M X 18/1M x 72 PIPELINED SYNC SRAM Sunset Owner: Jayasree Nayar (NJY) Replaced by: NONE CY7C1480V25 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM Functional Description[1]	Original	PDF	CY7C1480V25 72-MBIT 36/4M 18/1M CY7C1480V25 CY7C1480V25/CY7C1482V25/CY7C1486V25
CY7C1480V25 Abstract: CY7C1482V25 CY7C1486V25 U-575 f1168 Text: CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined Sync SRAM Functional Description[1] Features • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 167 MHz Registered inputs and outputs for pipelined operation	Original	PDF	CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 36/4M 18/1M 250-MHz CY7C1480V25, CY7C1482V25 CY7C1480V25 CY7C1486V25 U-575 f1168
F1037 Abstract: CY7C1480V25 CY7C1482V25 CY7C1486V25 Text: CY7C1480V25 CY7C1482V25 CY7C1486V25 PRELIMINARY 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined Sync SRAM Functional Description[1] Features • • • • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, 167 MHz	Original	PDF	CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 36/4M 18/1M 250-MHz 200-MHz 167-MHz F1037 CY7C1480V25 CY7C1482V25 CY7C1486V25
CY7C1480V25 Abstract: CY7C1482V25 CY7C1486V25 Text: CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation	Original	PDF	CY7C1480V25 CY7C1482V25 CY7C1486V25 72-Mbit 36/4M 18/1M 250-MHz CY7C1480V25, CY7C1482V25 209-Ball CY7C1480V25 CY7C1486V25
CY7C1338-100AXC Abstract: gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC Text: CYPRESS / GALVANTECH # - Connect pin 14 FT pin to Vss CY7C1019BV33-15VC GS71108AJ-12 & - Does not support 1.8V I/O CY7C1019BV33-15VXC GS71108AGJ-12 * - Tie down extra four I/Os with resistor CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12	Original	PDF	CY7C1019BV33-15VC GS71108AJ-12 CY7C1019BV33-15VXC GS71108AGJ-12 CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12 CY7C1019CV33-10VC GS71108AJ-10 CY7C1338-100AXC gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC
88E1111 Abstract: Marvell PHY 88E1111 Datasheet HFJ11-1G02E VSC8240 Marvell PHY 88E1111 altera Marvell PHY 88E1111 layout PC28F00AM29EWL Marvell PHY 88E1111 MDIO read write sfp 88e1111 sfp i2c Marvell PHY 88E1111 MDIO read write Text: 100G Development Kit, Stratix IV GT Edition Reference Manual 100G Development Kit, Stratix IV GT Edition Reference Manual 101 Innovation Drive San Jose, CA 95134 www.altera.com MNL-01057-1.0 Subscribe 2010 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.	Original	PDF	MNL-01057-1 88E1111 Marvell PHY 88E1111 Datasheet HFJ11-1G02E VSC8240 Marvell PHY 88E1111 altera Marvell PHY 88E1111 layout PC28F00AM29EWL Marvell PHY 88E1111 MDIO read write sfp 88e1111 sfp i2c Marvell PHY 88E1111 MDIO read write