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    CY7C1514JV18 Search Results

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    CY7C1514JV18 Price and Stock

    Infineon Technologies AG CY7C1514JV18-250BZXC

    IC SRAM 72MBIT PAR 165FBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1514JV18-250BZXC Tray 75 1
    • 1 $143.32
    • 10 $127.149
    • 100 $118.278
    • 1000 $118.278
    • 10000 $118.278
    Buy Now

    Rochester Electronics LLC CY7C1514JV18-250BZXC

    IC SRAM 72MBIT PARALLEL 165FBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1514JV18-250BZXC Bulk 3
    • 1 -
    • 10 $121.33
    • 100 $121.33
    • 1000 $121.33
    • 10000 $121.33
    Buy Now

    Cypress Semiconductor CY7C1514JV18-250BZXC

    CY7C1514JV18 - QDR SRAM, 2MX36, 0.45ns PBGA165 '
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Rochester Electronics CY7C1514JV18-250BZXC 216 1
    • 1 $116.66
    • 10 $116.66
    • 100 $109.66
    • 1000 $99.16
    • 10000 $99.16
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    CY7C1514JV18 Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C1514JV18 Cypress Semiconductor 72-Mbit QDR-II SRAM 2-Word Burst Architecture Original PDF
    CY7C1514JV18-250BZXC Cypress Semiconductor 72-Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V Original PDF

    CY7C1514JV18 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1510JV18, CY7C1525JV18 CY7C1512JV18, CY7C1514JV18 72-Mbit QDR -II SRAM 2-Word Burst Architecture Features Configurations • Separate Independent Read and Write Data Ports ❐ Supports concurrent transactions ■ 267 MHz Clock for High Bandwidth ■


    Original
    CY7C1510JV18, CY7C1525JV18 CY7C1512JV18, CY7C1514JV18 72-Mbit CY7C1510JV18 CY7C1525JV18 CY7C1512JV18 PDF

    CY7C1512JV18

    Abstract: CY7C1514JV18 CY7C1525JV18
    Text: CY7C1525JV18 CY7C1512JV18 CY7C1514JV18 72-Mbit QDR II SRAM 2-Word Burst Architecture Features Configurations • Separate Independent Read and Write Data Ports ❐ Supports concurrent transactions ■ 267 MHz Clock for High Bandwidth CY7C1525JV18 – 8M x 9


    Original
    CY7C1525JV18 CY7C1512JV18 CY7C1514JV18 72-Mbit CY7C1512JV18 CY7C1514JV18 CY7C1525JV18 PDF

    CY7C1510JV18

    Abstract: CY7C1512JV18 CY7C1514JV18 CY7C1525JV18
    Text: CY7C1510JV18, CY7C1525JV18 CY7C1512JV18, CY7C1514JV18 72-Mbit QDR -II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 267 MHz clock for high bandwidth ■


    Original
    CY7C1510JV18, CY7C1525JV18 CY7C1512JV18, CY7C1514JV18 72-Mbit CY7C1510JV18 CY7C1512JV18 CY7C1510JV18 CY7C1512JV18 CY7C1514JV18 CY7C1525JV18 PDF

    CY7C1512JV18

    Abstract: CY7C1514JV18 CY7C1525JV18
    Text: CY7C1525JV18 CY7C1512JV18 CY7C1514JV18 72-Mbit QDR II SRAM 2-Word Burst Architecture Features Configurations • Separate Independent Read and Write Data Ports ❐ Supports concurrent transactions ■ 267 MHz Clock for High Bandwidth CY7C1525JV18 – 8M x 9


    Original
    CY7C1525JV18 CY7C1512JV18 CY7C1514JV18 72-Mbit CY7C1512JV18 CY7C1514JV18 CY7C1525JV18 PDF

    Untitled

    Abstract: No abstract text available
    Text: THIS SPEC IS OBSOLETE Spec No: 001-14435 Spec Title: CY7C1525JV18 CY7C1512JV18 CY7C1514JV18, 72-MBIT QDR R II SRAM 2-WORD BURST ARCHITECTURE Sunset Owner: Anuj Chakrapani (AJU) Replaced by: None CY7C1525JV18 CY7C1512JV18 CY7C1514JV18 72-Mbit QDR II SRAM 2-Word Burst


    Original
    CY7C1525JV18 CY7C1512JV18 CY7C1514JV18, 72-MBIT CY7C1514JV18 CY7C1525JV18 CY7C1512JV18 PDF