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    TE Connectivity HIRD-S2-0132A-03

    Iridium antenna kit with 5 meter extension cables
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    DS2013 Datasheets (21)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    DS2013-120 Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013-120 Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013-120N Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013-50 Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013-50 Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013-50N Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013-65 Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013-65 Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013-65N Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013-80 Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013-80 Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013-80N Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013D-120 Dallas Semiconductor SRAM FIFO Original PDF
    DS2013D-50 Dallas Semiconductor SRAM FIFO Original PDF
    DS2013D-65 Dallas Semiconductor SRAM FIFO Original PDF
    DS2013D-80 Dallas Semiconductor SRAM FIFO Original PDF
    DS2013DN-50 Dallas Semiconductor SRAM FIFO Original PDF
    DS2013N-120 Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013N-50 Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF
    DS2013N-65 Dallas Semiconductor 8192 x 9 FIFO Chip Scan PDF

    DS2013 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    DS2013

    Abstract: DS2009
    Text: DS2013 DS2013 8192 x 9 FIFO Chip FEATURES PIN ASSIGNMENT • First-in, first-out memory-based architecture W 1 28 D8 D3 2 3 27 VCC D4 26 D5 D2 4 • Asychronous and simultaneous read/write D1 D0 D6 D7 • Bidirectional applications XI FF 5 6 7 25 24 23 • Fully expandable by word width or depth


    Original     		PDF DS2013 28-Pin DS2013 DS2009 DS2009

    5962R8973601VDA

    Abstract: No abstract text available
    Text: 54ACTQ32QML 54ACTQ32QML Quiet Series Quad 2-Input OR Gate Literature Number: SNOSAM1 54ACTQ32QML Quiet Series Quad 2-Input OR Gate General Description Features The ’ACTQ32 contains four, 2-input OR gates and utilizes NSC Quiet Series technology to guarantee quiet output


    Original     		PDF 54ACTQ32QML 54ACTQ32QML ACTQ32 54ACTQ32 5962R8973601VDA

    DS2013D

    Abstract: DS2009R DS2010 DS2011D DS2015 DS1609 DS2013 "Dual-Port RAM" DS2010R DS2011
    Text: DALLAS SEMICONDUCTOR 4401 South Beltwood Parkway Dallas, Texas 75244–3292 214 450–0400 Date: September 20, 1996 To: MET Laboratories, Baltimore, MD Subject: PRODUCT CHANGE NOTICE – H62901 Description: Product Obsolescence – DS20XX FIFO Family and


    Original     		PDF H62901 DS20XX DS1609 DS20XX DS2015 DS1609 DS2009 DS1609B DS2009D DS2013D DS2009R DS2010 DS2011D DS2013 "Dual-Port RAM" DS2010R DS2011

    AN-1378

    Abstract: JESD22-A114 LP38851 TA07B TO220-7
    Text: ご注意：この日本語データシートは参考資料として提供しており内容が最新でない 場合があります。製品のご検討およびご採用に際しては、必ず最新の英文デー タシートをご確認ください。


    Original     		PDF LP38851 ds201310 800mA LP38851-ADJ 115mV O-220 O-263 AN-1378 JESD22-A114 LP38851 TA07B TO220-7

    DS92LV1023

    Abstract: DS92LV1210 DS92LV1212 DS92LV1224 DS92LV1224TMSA FIGURE13 MSA28
    Text: ご注意：この日本語データシートは参考資料として提供しており内容が最新でない 場合があります。製品のご検討およびご採用に際しては、必ず最新の英文デー タシートをご確認ください。


    Original     		PDF DS92LV1224 300Mbps 600Mbps DS92LV1224 660Mbps 66MHz 300mW DS92LV1023 DS92LV1210 DS92LV1212 DS92LV1224TMSA FIGURE13 MSA28

    3970-44

    Abstract: LM3970 7H46 3H03
    Text: LP3970 Power Management Unit for Advanced Application Processor General Description Features The LP3970 is a multi-function, programmable Power Management Unit, designed especially for advanced application processors. The LP3970 is optimized for low power handheld PMU applications and provides 11 low dropout, low


    Original     		PDF LP3970 3970-44 LM3970 7H46 3H03

    LM8270

    Abstract: No abstract text available
    Text: June 2005 LMP8270 High Common Mode, Gain of 20, Precision Voltage Difference Amplifier General Description Features The LMP 8270 is a fixed gain differential amplifier with a Typical Values, TA = 25˚C n Input offset voltage 1 mV max n TCVos 15 µV/˚C max


    Original     		PDF LMP8270 LMPTM8270 LM8270

    LMP8277MMX

    Abstract: No abstract text available
    Text: LMP8277 High Common Mode, Gain of 14, Precision Voltage Difference Amplifier General Description Features The LMP8277 is a fixed gain differential amplifier with a –2V to 27V input common mode voltage range and a supply voltage range of 4.75V to 5.5V. The LMP8277 is part of the


    Original     		PDF LMP8277 LMP8277MMX

    lmh6550

    Abstract: AN-236 LMH6550MA LMH6550MAX LMH6550MM LMH6550MMX LMH730154 M08A MUA08A
    Text: LMH6550 Differential, High Speed Op Amp General Description Features The LMH 6550 is a high performance voltage feedback differential amplifier. The LMH6550 has the high speed and low distortion necessary for driving high performance ADCs as well as the current handling capability to drive signals


    Original     		PDF LMH6550 LMHTM6550 LMH6550 CSP-9-111S2) CSP-9-111S2. AN-236 LMH6550MA LMH6550MAX LMH6550MM LMH6550MMX LMH730154 M08A MUA08A

    dc to ac converter schematic using op-amp

    Abstract: AN-1149 JESD22-A114 LM3310 LM3310SQ LM3310SQX external charge pump on fpc 3x
    Text: LM3310 Step-Up PWM DC/DC Converter with Integrated Op-Amp and Gate Pulse Modulation Switch General Description Features The LM3310 is a step-up DC/DC converter integrated with an Operational Amplifier and a gate pulse modulation switch. The boost step-up converter is used to generate an adjustable output voltage and features a low RDSON internal switch


    Original     		PDF LM3310 LM3310 660kHz 28MHz 135mA CSP-9-111S2. dc to ac converter schematic using op-amp AN-1149 JESD22-A114 LM3310SQ LM3310SQX external charge pump on fpc 3x

    LP38856

    Abstract: TO220 NMOS Vbias JESD22-A114 T05D HBM PD
    Text: ご注意：この日本語データシートは参考資料として提供しており内容が最新でない 場合があります。製品のご検討およびご採用に際しては、必ず最新の英文デー タシートをご確認ください。


    Original     		PDF LP38856 ds201311 240mV O-220TO-263 O-220 O-263 LP38856 TO220 NMOS Vbias JESD22-A114 T05D HBM PD

    DS2009

    Abstract: DS2013
    Text: DS2013 DALLAS SEMICONDUCTOR DS2013 8 1 9 2 x 9 FIFO Chip FEATURES PIN ASSIGNMENT • First-in, first-out memory-based architecture w c 1* D8C 2 D3C 3 • Flexible 8192 x 9 organization • Low-power HCMOS technology D2C 4 D1C 5 DOC 6 • Asychronous and simultaneous read/write


    OCR Scan     		PDF DS2013 8192x9 DS2013 DS2009 512x9

    DS2009-512X9

    Abstract: No abstract text available
    Text: DS2013 DALLAS DS2013 8 1 9 2 x 9 FIFO Chip SEMICONDUCTOR FEATURES PIN ASSIGNMENT • First-in, first-out memory-based architecture w c 1* D8C 2 D3C 3 • Flexible 8192 x 9 organization • Low-power HCMOS technology D2C 4 D1C 5 DOC 6 • Asychronous and simultaneous read/write


    OCR Scan     		PDF DS2013 8192x9 DS2009 512x9 DS2009-512X9

    Untitled

    Abstract: No abstract text available
    Text: DS2013 D A LLAS DS2013 8192 X 9 FIFO Chip SEMICONDUCTOR FEATURES PIN ASSIGNMENT • First-in, first-out memory-based architecture w c 1* • Flexible 8192 x 9 organization D8C 2 D3C 3 • Low-power HCM OS technology D2C 4 • Asychronous and simultaneous read/write


    OCR Scan     		PDF DS2013 28-Pin DS2013 DS2009 DS2009

    FUH -29A001B

    Abstract: DS2013 FUH -29A001F DS2009
    Text: DS2013 DALLAS S E M I C O N D U C T O R CORP SOE D • DALLAS ds2013 s e m ic o n d u c to r FEATURES E b l 4 1 3 0 GGGMhlfi fi ■ DAL 8 1 9 2 x 9 F IF O C h ip PIN ASSIGNMENT • First-in, first-out memory-based architecture W [ 1« 28 □ vex: • Flexible 8192 x 9 organization


    OCR Scan     		PDF DS2013 8192x9 3557HP DS2013 DS2009 FUH -29A001B FUH -29A001F

    DS2009

    Abstract: No abstract text available
    Text: DS2013 DALLAS DS2013 8192x9FIF O C hip s e m ic o n d u c to r FEATURES PIN ASSIGNMENT • First-in, first-out memory-based architecture • Flexible 8192 x 9 organization • Low-power HCMOS technology • Asychronous and simultaneous read/write 28 □ VCC


    OCR Scan     		PDF DS2013 8192x9FIF S2013 DS2013 DS2009

    DIN 1445

    Abstract: DS1201
    Text: M ECH AN ICA L D R A W IN G S 8 - TO 28-PIN DIP 300 MIL Includes: DS1200 DS1259 DS2009D DS2010D DS2011D DS2013D PKG 8-PIN 10-PIN 14-PIN 16-PIN DIM MIN MAX MIN MAX MIN MAX MIN MAX AIN. MM 0.360 9.14 0.400 10.16 0.480 12.19 0.520 13.21 0.740 18.80 0.780 19.81


    OCR Scan     		PDF 28-PIN DS1200 DS1259 DS2009D DS2010D DS2011D DS2013D 10-PIN 14-PIN 16-PIN DIN 1445 DS1201

    Untitled

    Abstract: No abstract text available
    Text: DALLAS SEMICONDUCTOR FEATURES DS2013 8 1 9 2 x 9 FIFO Chip PIN ASSIGNMENT • First-in, first-out memory-based architecture W [ 1* • Flexible 8192 x 9 organization DSC 2 D 3C 3 • Low-power H C M O S technology D 2C 4 • Asychronous and simultaneous read/write


    OCR Scan     		PDF DS2013 DS2013 S2013 DS2009 DS2009

    DS1666

    Abstract: DS2011D 74F04 DS1003 DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003-40 DS1003M
    Text: DS1003 DS1003 DALLAS SEMICONDUCTOR FEATURES 4-Tap Silicon Delay Line for RISC A pplications PIN ASSIGNMENT • All-silicon tim e delay IN • Four delayed clock phases from input NC • Input frequency independent NC NC • Precise tap-to-tap delays • Leading and trailing edge precision


    OCR Scan     		PDF DS1003 14-pin DS1003 l413D 0D14415 DS1666 DS2011D 74F04 DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003-40 DS1003M

    ds1285q

    Abstract: DS1640
    Text: D S 12 8 5 /D S 1285Q DALLAS SEMICONDUCTOR FEATURES D S 1285/D S 1285Q Real Tim e C lock PIN ASSIGNMENT • Drop-in replacem ent for IBM AT com puter clock/ca­ lendar • Pin configuration closely m atches M C146818A • Counts seconds, minutes, hours, day of the week,


    OCR Scan     		PDF 1285Q 1285/D 24-hour 12-hour ds1285q DS1640

    DS1640

    Abstract: No abstract text available
    Text: DS1668, DS1669, DS1669S DALLAS SEMICONDUCTOR DS1668, DS1669, DS1669S D allastat Electronic Digital Rheostat FEATURES PIN ASSIGNMENT DS1669 • Replaces mechanical variable resistors • Available as the DS1668 with manual interface or the DS1669 integrated circuit


    OCR Scan     		PDF DS1668, DS1669, DS1669S DS1669 DS1668 DS1669 DS1668 DS1640

    DS1640

    Abstract: No abstract text available
    Text: DS129X DALLAS SEMICONDUCTOR FEATURES • Replaces 8 or 16 h a rd -to -g e t-a t m anual switches DS129x Elim inator PIN ASSIGNMENT GND2 [ 24 ] GND3 2 23 ] VCC T 23Ì VCC Dl [ 3 22 ] OA Dl 22Ì OA OQ [ 4 21 ] OB OQ 211 OB 00 5 20 ] OC 00 oe ON [ 6 19 ] OD om


    OCR Scan     		PDF DS129X 2bl4130 DD14435 DS1640

    DS1640

    Abstract: No abstract text available
    Text: D S 1809 PRELIMINARY DALLAS SEMICONDUCTOR FEATURES DS1809 Dallastat PIN ASSIGNMENT • 64-position linear taper • Two nonvolatile wiper storage options Rh [ 1 8 ] v cc UC £ 2 7 ] DC • Operates from +2.7 to +5.5 volt supplies STR • Standard Resistance values:


    OCR Scan     		PDF 64-position DS1809 001441fl DS1640

    DS102

    Abstract: DS1640
    Text: DS1012 DALLAS SEMICONDUCTOR FEATURES 2-in-1 Sub-M iniature Silicon Delay Line with Logic PIN ASSIGNMENT • A ll-s ilic o n tim e d e la y • 5 3 n W m ax. C M O S q u ie s c e n t m o de • S u rfa c e m o u n t 8-p in m in i-S O IC a n d s ta n d a rd 8-pin


    OCR Scan     		PDF DS1012 14-PIN 16-PIN 0D1441fl DS102 DS1640