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    onsemi FIN1018MX

    IC TRANSCEIVER 0/1 8SOIC
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    DigiKey FIN1018MX Reel
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    EBV Elektronik FIN1018MX 143 Weeks 2,500
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    Rochester Electronics LLC FIN1018MX

    IC TRANSCEIVER 0/1 8SOIC
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    DigiKey FIN1018MX Bulk 1,665
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    FAIRCHILD FIN1018MX

    LVDS Receiver 400Mbps 8-Pin SOIC T/R
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    Verical FIN1018MX 318,982 2,037
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    FIN1018MX 11,710 2,037
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    FIN1018MX 2,500 2,037
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    Fairchild Semiconductor Corporation FIN1018MX

    3.3V LVDS 1-Bit High Speed Differential Receiver
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    Rochester Electronics FIN1018MX 338,058 1
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    Others FIN1018MX

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    Chip 1 Exchange FIN1018MX 4,190
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    FIN1018MX Datasheets (3)

    Part
    ECAD Model
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    Description
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    Datasheet Type
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    FIN1018MX Fairchild Semiconductor Bus/Line Transceiver, RS-644, Fail Safe, 400Mbps, Tape and Reel, 8-SOIC Original PDF
    FIN1018MX Fairchild Semiconductor 3.3V LVDS 1-Bit High Speed Differential Receiver Original PDF
    FIN1018MX_NL Fairchild Semiconductor 3.3V LVDS 1-Bit High Speed Differential Receiver Original PDF

    FIN1018MX Datasheets Context Search

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    FIN1017

    Abstract: FIN1018 FIN1018K8X FIN1018M FIN1018MX M08A MO-187
    Text: Revised April 2002 FIN1018 3.3V LVDS 1-Bit High Speed Differential Receiver General Description Features This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal


    Original
    FIN1018 400Mbs FIN1018 FIN1017, FIN1017 FIN1018K8X FIN1018M FIN1018MX M08A MO-187 PDF

    FIN1017

    Abstract: FIN1018 FIN1018K8X FIN1018M FIN1018MX M08A
    Text: Revised September 2001 FIN1018 3.3V LVDS 1-Bit High Speed Differential Receiver General Description Features This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal


    Original
    FIN1018 400Mbs FIN1018 FIN1017, FIN1017 FIN1018K8X FIN1018M FIN1018MX M08A PDF

    FIN1017

    Abstract: FIN1018 FIN1018K8X FIN1018M FIN1018MX M08A
    Text: Revised April 2001 FIN1018 3.3V LVDS 1-Bit High Speed Differential Receiver General Description Features This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal


    Original
    FIN1018 400Mbs FIN1018 FIN1017, FIN1017 FIN1018K8X FIN1018M FIN1018MX M08A PDF

    Untitled

    Abstract: No abstract text available
    Text: Revised February 2002 FIN1018 3.3V LVDS 1-Bit High Speed Differential Receiver General Description Features This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal


    Original
    FIN1018 FIN1017, 400Mbs PDF

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Revised February 2001 FIN1018 3.3V LVDS 1-Bit High Speed Differential Receiver Preliminary General Description Features This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal


    Original
    FIN1018 400Mbs FIN1018 FIN1017, PDF

    Untitled

    Abstract: No abstract text available
    Text: Revised December 2001 FIN1018 3.3V LVDS 1-Bit High Speed Differential Receiver General Description Features This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal


    Original
    FIN1018 FIN1017, 400Mbs PDF