Untitled
Abstract: No abstract text available
Text: CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 1,024 x 36 x 2 FEATURES: • • • • • • • • • Memory storage capacity: IDT723626 – 256 x 36 x 2 IDT723636 – 512 x 36 x 2 IDT723646 – 1,024 x 36 x 2 Clock frequencies up to 83 MHz 8ns access time
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IDT723626
IDT723636
IDT723646
36-bit
18-bit
18-bit
com/docs/PSC4045
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Untitled
Abstract: No abstract text available
Text: CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 1,024 x 36 x 2 FEATURES: • • • • • • • • • Memory storage capacity: IDT723626 – 256 x 36 x 2 IDT723636 – 512 x 36 x 2 IDT723646 – 1,024 x 36 x 2 Clock frequencies up to 83 MHz 8ns access time
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IDT723626
IDT723636
IDT723646
IDT723626
IDT723636
36-bit
18-bit
18-bit
com/docs/PSC4045
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IDT723626
Abstract: IDT723636 IDT723646
Text: IDT723626/723636/723646 Bus Matching Triple Bus SyncFIFO 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2 CMOS Triple Bus SyncFIFO With Bus Matching 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2 Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE ADVANCE
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IDT723626/723636/723646
IDT723626
IDT723636
IDT723646
IDT723626
IDT723636
IDT723646
36-bit
undirectional18-bit
AO-A35
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IDT723626
Abstract: IDT723636 IDT723646 asynchronous dual port SRAM IDT
Text: IDT723626/723636/723646 Bus Matching Triple Bus SyncFIFO 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2 CMOS Triple Bus SyncFIFO™ With Bus Matching 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2 Integrated Device Technology, Inc. COMMERCIAL TEMPERATURE RANGE ADVANCE
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IDT723626/723636/723646
IDT723626
IDT723636
IDT723646
IDT723626
IDT723636
IDT723646
36-bit
undirectional18-bit
AO-A35
asynchronous dual port SRAM IDT
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IDT723626
Abstract: IDT723636 IDT723646
Text: CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 1,024 x 36 x 2 FEATURES: • • • • • • • • • Memory storage capacity: IDT723626 – 256 x 36 x 2 IDT723636 – 512 x 36 x 2 IDT723646 – 1,024 x 36 x 2 Clock frequencies up to 83 MHz 8ns access time
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IDT723626
IDT723636
IDT723646
36-bit
18-bit
18-bit
drw32
IDT723626
IDT723636
IDT723646
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Untitled
Abstract: No abstract text available
Text: CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 1,024 x 36 x 2 FEATURES: • • • • • • • • • Memory storage capacity: IDT723626 – 256 x 36 x 2 IDT723636 – 512 x 36 x 2 IDT723646 – 1,024 x 36 x 2 Clock frequencies up to 83 MHz 8ns access time
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IDT723626
IDT723636
IDT723646
36-bit
18-bit
18-bit
PK128-1)
drw32
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IDT723636
Abstract: IDT723646 IDT723626
Text: CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 1,024 x 36 x 2 • • • FEATURES: • • • • • • Memory storage capacity: IDT723626 – 256 x 36 x 2 IDT723636 – 512 x 36 x 2 IDT723646 – 1,024 x 36 x 2 Clock frequencies up to 83 MHz 8ns access time
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IDT723626
IDT723636
IDT723646
36-bit
18-bit
18-bit
drw32
IDT723636
IDT723646
IDT723626
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IDT723626
Abstract: IDT723636 IDT723646
Text: CMOS Triple Bus SyncFIFOTM With Bus-Matching 256 x 36 x 2 512 x 36 x 2 1,024 x 36 x 2 FEATURES: PRELIMINARY IDT723626 IDT723636 IDT723646 ♦ ♦ Big- or Little-Endian format for word and byte bus sizes Master Reset clears data and configures FIFO, Partial Reset
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IDT723626
IDT723636
IDT723646
128-pin
IDT72
com/docs/PSC4045
IDT723626
IDT723636
IDT723646
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Untitled
Abstract: No abstract text available
Text: CMOS TRIPLE BUS SyncFIFOTM WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2 1,024 x 36 x 2 FEATURES: • • • • • • • • • Memory storage capacity: IDT723626 – 256 x 36 x 2 IDT723636 – 512 x 36 x 2 IDT723646 – 1,024 x 36 x 2 Clock frequencies up to 67 MHz 10ns access time
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IDT723626
IDT723636
IDT723646
36-bit
18-bit
18-bit
drw32
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IDT723626
Abstract: IDT723636 IDT723646
Text: CMOS Triple Bus SyncFIFOTM With Bus-Matching 256 x 36 x 2 512 x 36 x 2 1,024 x 36 x 2 FEATURES: IDT723626 IDT723636 IDT723646 • Big- or Little-Endian format for word and byte bus sizes • Master Reset clears data and configures FIFO, Partial Reset clears data but retains configuration settings
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IDT723626
IDT723636
IDT723646
128-pin
IDT723626
IDT723636
PK128-1)
IDT723646
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IDT723626
Abstract: IDT723636 IDT723646
Text: CMOS Triple Bus SyncFIFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 Integrated Device Technology, Inc. PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: There are two errata notices at the end of this data sheet. The corrections have already been incorporated
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IDT723626
IDT723636
IDT723646
18-bit
18-bits
IDT723626
IDT723636
IDT723646
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IDT723626
Abstract: IDT723636 IDT723646
Text: CMOS Triple Bus SyncFIFOTM With Bus-Matching 256 x 36 x 2 512 x 36 x 2 1,024 x 36 x 2 FEATURES: PRELIMINARY IDT723626 IDT723636 IDT723646 ♦ ♦ Big- or Little-Endian format for word and byte bus sizes Master Reset clears data and configures FIFO, Partial Reset
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IDT723626
IDT723636
IDT723646
128-pin
IDT72
com/docs/PSC4045
IDT723626
IDT723636
IDT723646
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IDT723626
Abstract: IDT723636 IDT723646 A18-A3
Text: CMOS Triple Bus SyncFIFO“ With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2 Integrated Device Technology, Inc. PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: There are two errata notices at the end of this data sheet. The corrections have already been incorporated
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IDT723626
IDT723636
IDT723646
18-bit
18-bits
IDT723626
IDT723636
IDT723646
A18-A3
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IDT723626
Abstract: IDT723636 IDT723646
Text: CMOS Triple Bus SyncFIFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024 x 36 x 2 Integrated Device Technology, Inc. PRELIMINARY IDT723626 IDT723636 IDT723646 FEATURES: • Memory storage capacity: IDT723626–256 x 36 x 2 IDT723636–512 x 36 x 2 IDT723646–1024 x 36 x 2
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IDT723626
IDT723636
IDT723646
IDT723626
IDT723636
IDT723646
36-bit
18-bit
IDT723626/723636/723646
PK128-1)
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Untitled
Abstract: No abstract text available
Text: In te g ra te d D e v i e T e d h n o Jo g y , lie . CMOS Triple Bus SyncFlFO1 With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: There are two errata notices at the end of this data sheet. The May 20 errata describes corrections that have
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1024x36x2
IDT723626
IDT723636
IDT723646
18-bit
18-bits
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Untitled
Abstract: No abstract text available
Text: |dy Integrated Dev ice Technology, Inc. CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY I D T y iii ll IDT723646 FEATURES: • Memory storage capacity: IDT723626-256 x 36 x 2 IDT723636-512 x 3 6 x 2 IDT723646-10 2 4 x 3 6 x 2
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1024x36x2
IDT723646
IDT723626-256
IDT723636-512
IDT723646-10
36-bit
18-bit
IDT723626/723636/723646
PK128-1)
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Untitled
Abstract: No abstract text available
Text: |dy Irtegiated. Dev xe TechnoJogy, lie . CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1 , 02 4 x3 6 x 2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: There are two errata notices at the end of this data sheet. The corrections have already been incorporated
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IDT723626
IDT723636
IDT723646
18-bit
18-bits
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Untitled
Abstract: No abstract text available
Text: |dy In teg rated Dev ice Technology, Inc. CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1024x36x2 PRELIMINARY I D T y iii ll IDT723646 FEATURES: • Memory storage capacity: IDT723626-256 x 36 x 2 IDT723636-512 x 3 6 x 2 IDT723646-10 2 4 x 3 6 x 2
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1024x36x2
IDT723646
IDT723626-256
IDT723636-512
IDT723646-10
36-bit
18-bit
IDT723626/723636/723646
PK128-1)
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Untitled
Abstract: No abstract text available
Text: In tegrated D e vice T e ch n o lo g y , Inc. CMOS Triple Bus SyncFIFOT With Bus-Matching 256x36x2, 512x36x2, 1024x36x2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: The errata notice on the last page describes corrections that have already been added to this document.
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256x36x2,
512x36x2,
1024x36x2
IDT723626
IDT723636
IDT723646
IDT723626-256
IDT723636-512
IDT723646-1024
36-bit
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Untitled
Abstract: No abstract text available
Text: |dy Integrated D ev jce Technology, lie . CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1 , 02 4 x3 6 x 2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: There are two errata notices at the end of this data sheet. The corrections have already been incorporated
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IDT723626
IDT723636
IDT723646
18-bit
18-bits
FIF01
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BO 817
Abstract: A8AQ bo817 BO-817
Text: CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2 512x36x2 1,024 x 36 x2 FEATU RES: • Memory storage capacity: IDT723626-256 x 36 x 2 IDT723636—512 x 36 x 2 IDT723646-1,024 x 36 x 2 • Clock frequencies up to 67 MHz 10ns access time • Two independent FIFOs buffer data between one bidirectional
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512x36x2
IDT723S26
IDT723036
IDT723846
IDT723626-256
IDT723636--
IDT723646-1
36-brt
18-bit
18-bit
BO 817
A8AQ
bo817
BO-817
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Untitled
Abstract: No abstract text available
Text: i CMOS Triple Bus SyncFlFO With Bus-Matching 256 x 36 x 2 512x36x2 1,024x36x2 :$ *& & * 4« *»»« tK fc « * 'S * * * * ; « it i« « ^ iL j; IDT723626 IDT723636 IDT723646 FE A TU R E S : • Big- or Little-Endian format for word and byte bus sizes
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512x36x2
024x36x2
IDT723626
IDT723636
IDT723646
IDT723626-256
IDT723636-512
IDT723646-1
2S771
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Untitled
Abstract: No abstract text available
Text: | CMOS Bus-Matching SyncFlFO 256 x 36, 512 x 36,1,024 x 36 dt PRELIMINARY ¡DT723633 IDT723643 Integrated D ev ic e Techno logy, Inc. NOTE: There is an errata notice on the last page and the corrections have been incorporated into this document. FEATURES:
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DT723633
IDT723643
IDT723623-256
IDT723633-512
T723643-1
MO-136,
2S771
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Untitled
Abstract: No abstract text available
Text: CMOS SyncBiFlFO 256x36x2, 512x36x2, 1,024x36x2 IDT723622 IDT723632 IDT723642 Hhtegiated Devize Technology, lie . NOTE: There is an errata notice on the last page and the corrections have been incorporated into this document. FEATURES: • Free-running C LK A and CLKB may be asynchronous or
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256x36x2,
512x36x2,
024x36x2
IDT723622
IDT723632
IDT723642
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