f0035
Abstract: f0035 a1 tagl2 mps a91 TAGL8 0035j tagf2 LR3000GC-20 LR3000A lr3000gc20
Text: Chapter 12: Specifications This chapter presents the following information for the LR3000 and LR3000A processors: • LR.3000 Electrical Specifications • LR3000A Electrical Specifications • Timing Diagrams • Mechanical, Pinout, and Mounting Information
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LR3000
LR3000A
LR3000GC-16
144-pin
LR3000LM-16
172-pin
LR3000GM-16
f0035
f0035 a1
tagl2
mps a91
TAGL8
0035j
tagf2
LR3000GC-20
lr3000gc20
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tagl2
Abstract: S 0680 LR3000 DK3T TAG23 LR3000AKC33 lr3000gc20 MM7200 TAG24
Text: Chapter 12: Specifications This chapter presents the following information for the LR3000 and LR3000A processors: • LR3000 Electrical Specifications • LR3000A Electrical Specifications • Timing Diagrams • Mechanical, Pinout, and Mounting Information
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LR3000
LR3000A
144-pin
172-pin
tagl2
S 0680
DK3T
TAG23
LR3000AKC33
lr3000gc20
MM7200
TAG24
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k535
Abstract: CDB22 LR3000 cxl tuner diagram interfacing of memory devices with 8086 LB1K LR3202A LR3203 LR3205 LR32D04
Text: Chapter 3 LR3202A L-Bus Controller This chapter describes the LR3202A L-Bus Controller. Chapter 3 is organized into these sections: • General Description ■ Configuring the LR3202A ■ Programming the System Control Registers ■ Signal Definitions ■ L-Bus Operation
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LR3202A
LR3202A
k535
CDB22
LR3000
cxl tuner diagram
interfacing of memory devices with 8086
LB1K
LR3203
LR3205
LR32D04
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tag 8820
Abstract: LR3000 FGR31 LR3910A lr3010hc-20 floating point handling MIPS FPA LR3000A i1991 CLDCC
Text: LSI LOGIC LR3010/LR3010A Floating-Point Accelerator Preliminary Introduction The LR3010 and LR3010A Floating-Point Accelerators FPAs from LSI Logic Corporation implement the floating-point coprocessor architecture of MIPS M icrosystem s in high performance CMOS. Both FPAs are in full
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LR3010/LR3010A
LR3010
LR3010A
tag 8820
LR3000
FGR31
LR3910A
lr3010hc-20
floating point handling
MIPS FPA
LR3000A
i1991
CLDCC
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53c90 NCR
Abstract: LR3205 LR3000 LR3000A 53c90
Text: Chapter 6 LR3205 Block Transfer Buffer This chapter describes the LR3205 Block Transfer Buffer. Chapter 6 is organized into these sections: 6.1 General Description a General Description • Concepts ■ Programming the Internal Registers ■ Signal Definitions
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LR3205
LR3000
LR3202A
53c90 NCR
LR3000A
53c90
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AXP 209
Abstract: UPD65031 UPD65070 UPD65006 intel 80487 SCX6206 HG62B40 UPD65022 mb86901 UPD71641
Text: _► ADVANCED Device to PGA Socket Cross Reference INTERCONNECTIONS. 5 Energy Way, P.O. Box 1019, West Warwick, RI 02893 USA Tel. 800-424-9850 / 401-823-5200 •Fax 401-823-8723 ■Email advintcorp@aol.com ■Internet http://www.advintcorp.com Actel Device#
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A1280-PG176
A1240-PG132
MB86920
MB86930
MB86940
MB87067
MB87068
MB8764
MBL80286
AXP 209
UPD65031
UPD65070
UPD65006
intel 80487
SCX6206
HG62B40
UPD65022
mb86901
UPD71641
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PDF
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LR3000
Abstract: LR3000A
Text: Chapter 3 LR3202A L-Bus Controller This chapter describes the LR3202A L-Bus Controller. Chapter 3 is organized into these sections: • General Description ■ Configuring the LR3202A ■ Programming the System Control Registers ■ Signal Definitions ■ L-Bus Operation
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LR3202A
LR3202A
LR3000
LR3000A
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RST02
Abstract: LR2000 LR3000
Text: Chapter 2 LR3201 Reset/Interrupt Controller This chapter describes the LR3201 Reset/Interrupt Controller. This chapter is oiganized into these sections: • General Description ■ Reset Operation ■ Interrupt Operation ■ Signal Definitions ■ Interfacing to the LR3201
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LR3201
LR3201
LR3201.
LR3000
RST02
LR2000
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LR3000
Abstract: 8196 LR3000 User Manual lr2000 LR3201 mps 0709 LR3000A RST01 mps 1410
Text: Chapter 2 LR3201 Reset/Interrupt Controller This chapter describes the LR3201 Reset/Interrupt Controller. This chapter is organized into these sections: • General Description ■ Reset Operation ■ Interrupt Operation ■ Signal Definitions ■ Interfacing to the LR3201
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LR3201
LR3201
LR3201.
LR3000
8196
LR3000 User Manual
lr2000
mps 0709
LR3000A
RST01
mps 1410
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Untitled
Abstract: No abstract text available
Text: LSI LOGIC LR3010/LR3010A Floating-Point Accelerator Preliminary Introduction The LR3010 and LR3010A Floating-Point A ccelerators FPAs from LSI Logic Corporation implement the floating-point coprocessor architecture of MIPS M icrosystem s in highperformance CMOS. Both FPAs are in full
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LR3010/LR3010A
LR3010
LR3010A
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PDF
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53c90 NCR
Abstract: bdp 620 LR3000 53c90 concept igt 001 0C00 LR3202A LR3205
Text: Chapter 6 LR3205 Block Transfer Buffer This chapter describes the LR3205 Block Transfer Buffer. Chapter 6 is organized into these sections: • General Description ■ Concepts ■ Programming the Internal Registers ■ Signal Definitions ■ B-Bus Interface
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LR3205
LR3000
LR3202A
53c90 NCR
bdp 620
53c90
concept igt 001
0C00
LR3202A
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