GFT1811A
Abstract: 74181 alu 74181 alu 74181 logic Alu 183 32 bit carry select adder
Text: Table of Contents - Part II The follow ing megafunctions are available in the LL7000 Series, LL9000 Series, and LSA2000 Series of channeled gate array products. M ost of these are also available in the LL5000 Series of gate arrays. M egafunction Name Type
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LL7000
LL9000
LSA2000
LL5000
GFA0010A
GFA0040A
GFA0090A
GFA0100A
GFA0101A
GFA0102A
GFT1811A
74181
alu 74181
alu 74181 logic
Alu 183
32 bit carry select adder
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Untitled
Abstract: No abstract text available
Text: GFS2020A GFS2020A GFS2020A 1 6 X 4 CAM WITHOUT MASK GENERAL DESCRIPTION: THE GFS2020A MEGAFUNCTION IS A 16-WORD BY 4-BIT CONTENT ADDRESSABLE MEMORY CAM . THIS MEGAFUNCTION IS FUNCTIONALLY IDENTICAL TO THE FAIRCHILD 100142 EXCEPT THAT IT HAS SIXTEEN WORDS INSTEAD OF FOUR AND IT HAS NO MASK FUNCTION. FOR A DETAILED
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GFS2020A
GFS2020A
16-WORD
LL7000
LSA2000
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amd 2900
Abstract: Y122 Am2910 y322
Text: GFAOIOIA GFAOIOIA GFAOIOIA MICROPROGRAM CONTROLLER GENERAL DESCRIPTION: THE GFAOIOIA IS A 5-DEEP STACK, 16-BIT WIDE ADDRESS SEQUENCER WHICH CONTROLS THE SEQUENCE OF EXECUTION OF THE MICRO-INSTRUCTIONS. IT IS DESIGNED TO BE FULLY COMPATIBLE WITH THE AM2910 EXCEPT WHEN ILLEGAL OPERATIONS ARE PERFORMED ON THE STACK
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GFA0101A
16-BIT
AM2910
LL7000
amd 2900
Y122
y322
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Untitled
Abstract: No abstract text available
Text: GFS2010A GFS2010A GFS2 01OA 8 X 4 CAM WITHOUT MASK G E N ERAL D E S C R I P T I O N : THE GFS2010A MEGAFUNCTION IS AN 8-WORD BY 4-BIT CONTENT ADDRESSABLE MEMORY CAM . THIS MKGAFUNCTION IS FUNCTIONALLY IDENTICAL TO THE FAIRCHILD 100142 EXCEPT THAT IT HAS EIGHT WORDS INSTEAD OF FOUR AND IT HAS NO MASK FUNCTION. FOR A DETAILED
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GFS2010A
GFS2010A
LL7000
LSA2000
-GFS2010A
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LSA2000
Abstract: 74181 alu
Text: GFT1813A GFT1813A GFT1813A 32-BIT ALU GENERAL DESCRIPTION: THE GFT1813A MEGAFUNCTION IS LOGICALLY IDENTICAL TO THE TI 74181, EXCEPT IT OPERATES ON TWO 32-BIT WORDS. THE GPT1813A ARITHMETIC LOGIC UNIT ALU PERFORMS 16 LOGICAL OPERATIONS, AND USES A 32-BIT FAST CARRY-SELECT ADDER TO PERFORM 16
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GFT1813A
GFT1813A
32-BIT
GPT1813A
A31-A0
B31-B0)
LSA2000
74181 alu
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Untitled
Abstract: No abstract text available
Text: GFB0220A GFB0220A GFB0220A 16-BIT CARRY-SELECT ADDER GENERAL D E S C R I P T I O N : THE GFB0220A USES A FAST CARRY-SELECT ALGORITHM TO PERFORM AN ADDITION OF TWO 16-BIT NUMBERS. PIN DIAGRAM: GFB0220A •GATES USED » 287 -AREA USED - 376 GATE LOCATIONS •PROPAGATION DELAY « 28 NS
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GFB0220A
GFB0220A
16-BIT
LL7000
LSA2000
-GFB0220A
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TRANSISTOR a31
Abstract: magnitude comparator Transistor B29 transistor A19 P
Text: GFC2200A GFC2200A 32-BIT MAGNITUDE COMPARATOR GFC2200A GENERAL DESCRIPTION: THE GFC2200A IS A MAGNITUDE COMPARATOR. IT COMPARES TWO 32-BIT BINARY NUMBERS AND YIELDS THREE OUTPUTS {A>B, A<B„ AND A-B . PIN DIAGRAM: GFC2200A - GATES USED - 34 8 - AREA USED - 379 GATE
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GFC2200A
GFC2200A
32-BIT
LL7000
LSA2000
-GFC2200A
TRANSISTOR a31
magnitude comparator
Transistor B29
transistor A19 P
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through data 4 a
Abstract: No abstract text available
Text: GFS0510A GFS0510A GFS0510A 16 X 4 FIFO FIRST-IN FIRST-OUT GENERAL DESCRIPTION: THE GFS0510A MEGAFUNCTION IS A 16 X 4 FIFO (FIRST-IN FIRST-OUT) . IT HAS SEPARATE READ (RDN) AND WRITE (WRN) CLOCKS WHICH ARE COMPLETELY INDEPENDENT <CAN BE ASYCHRONOUS) . THIS FIFO USES A "FALL-THROUGH“ ALGORITHM IN WHICH
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GFS0510A
GFS0510A
through data 4 a
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P08 transistor
Abstract: 8x8 booth multiplier
Text: GFB2000A GFB2000A GFB2000A 8X8 2 'S COMPLEMENT MULTIPLIER GENERAI. DESCRIPTION: THE GFB2000A MEGAFUNCTION 15 AN 8-BY-8 2 'S COMPLEMENT MULTIPLIER WHICH GENERATES A 16-BIT PRODUCT. BY USING A MODIFIED BOOTH ALGORITHM, THIS MEGAFJNCTION GIVES A REASONABLE SPEED AND GATE COUNT.
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GFB2000A
GFB2000A
16-BIT
GFB200
LL7000
LSA2000
POOs15
P08 transistor
8x8 booth multiplier
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Am29501
Abstract: BM05 05GN amd 2900 transistor BMO 123
Text: GFA5010A GFA5010A GFA5010A MULTI-PORT PIPELINED PROCESSOR GENERAL DESCRIPTION: THE GFA5010A IS DESIGNED TO BE FULLY COMPATIBLE WITH THE AM29501 BYTE—SLICE MULTI-PORT PIPELINED PROCESSOR, EXCEPT THAT THE I/O'S ARE DIFFERENT SEE PAGE 2 OF 4 FOR A DESCRIPTION OF THE ENHANCEMENTS TO THE AM29501 . FOR A DETAILED
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GFA5010A
GFA5010A
AM29501
AM29501)
LL7000
LSA2000
BM05
05GN
amd 2900
transistor BMO 123
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5 pin ic ARB
Abstract: amd 2900
Text: GFA0040A GFA0040A GFA0040A STATUS AND SHIFT CONTROL UNIT GENERAL DESCRIPTION : THE GFA004 0A IS DESIGNED TO BE FUNCTIONALLY IDENTICAL TO THE AM2904 f ALTHOUGH THE I/O'S ARE DIFFERENT SEE PAGE 2 OF 3 FOR THE ENHANCEMENTS TO THE AM2904 . FOR A DETAILED FUNCTIONAL DESCRIPTION SEE THE AMD 2900 DATA BOOK.
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GFA0040A
GFA0040A
GFA004
AM2904
AM2904)
LL7000
LSA2000
5 pin ic ARB
amd 2900
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transistor p06
Abstract: P08 transistor p023 transistor
Text: GFB2010A GFB2010A GFB2010A 12 X 12 2 1S COMPLIMENT MULTIPLIER GENERAL DESCRIPTION: THE GFB2010A MEGAFUNCTION IS A 12 X 12 2 1S COMPLEMENT MULTIPLIER WHICH GENERATES A 24-BIT PRODUCT. BY USING A MODIFIED BOOTH ALGORITHM, THIS MEGAFUNCTION GIVES A REASONABLE SPEED AND GATE COUNT.
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GFB2010A
GFB2010A
24-BIT
LL7000
LSA2000
-GFB2010ABOOX
transistor p06
P08 transistor
p023 transistor
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16-bit alu
Abstract: functional diagram of ALU
Text: GFB1020A GFB1020A 16-BIT ALU GFB1020A GENERAL DESCRIPTION: THE GFB1020A MEGAFUNCTION IS A 16-BIT VERSION OF THE FAIRCHILD 100181 ALU, EXCEPT FOR THE ABSENCE OF THE OUTPUT LATCHES AND THE LATCH ENABLE SIGNAL. THE GFB1020A ARITHMETIC LOGIC UNIT ALU PERFORMS 4 BINARY, 4 BCD, AND 8 LOGIC OPERATIONS ON
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GFB1020A
GFB1020A
16-BIT
A15-A0
B15-B0)
16-bit alu
functional diagram of ALU
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s16 transistor
Abstract: transistor bl 187 c14 c13
Text: GFB0600A GFB0600A GFB0600A 3-PORT 16-BIT CARRY-SELECT ADDER GENERAL DESCRIPTION: THE GFB0600A IS A 3-PORT 16-BIT CARRY-SELECT ADDER. IT USES A FAST CARRYSELECT ALGORITHM TO PERFORM ADDITION OF THREE 16-BIT NUMBERS. PIN DIAGRAM: GFB0600A - GATES USED - 396
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GFB0600A
GFB0600A
16-BIT
LL7000
LSA2000
s16 transistor
transistor bl 187
c14 c13
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Untitled
Abstract: No abstract text available
Text: GFC2100A GFC2100A GFC2100A 16-BIT MAGNITUDE COMPARATOR GENERAL DESCRIPTION: THE GFC2100A IS A MAGNITUDE COMPARATOR. IT COMPARES TWO 16-BIT BINARY NUMBERS AND YIELDS THREE OUTPUTS A>B, A<B, AND A-B . PIN DIAGRAM: GFC2100A - GATES USED - 170 •AREA USED - 183 GATE
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GFC2100A
GFC2100A
16-BIT
LL7000
LSA2000
-GFC2100A
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zn21
Abstract: Transistor R25 r23 transistor zn15 ZN27 R26 transistor R13/r25 transistor
Text: GFC1020A GFC1020A GFC1020A 32-BIT BARREL SHIFTER GENERAL DESCRIPTION: THE GFC1020A MEGAFUNCTION PERFORMS A 32-BIT END—AROUND SHIFT, OR BARREL SHIFT. THERE ARE FIVE CONTROL LINES SI, S2 , S4 , S8, AND S16 TO DETERMINE HOW MANY PLACES TO THE LEFT THE 32-BIT INPUTS (R31 THROUGH RO) WILL BE SHIFTED AT THE
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GFC1020A
GFC1020A
32-BIT
LL7000
LSA2000
zn21
Transistor R25
r23 transistor
zn15
ZN27
R26 transistor
R13/r25 transistor
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Untitled
Abstract: No abstract text available
Text: GFI2590A GFI2590A GFI2590A PROGRAMMABLE INTERRUPT CONTROLLER G E NERAL DESCRIPTION: THE GFI2590A IS A PROGRAMMABLE INTERRUPT CONTROLLER FOR USE IN A MICROCOMPUTER SYSTEM. IT CAN RESOLVE 8 PRIORITY INTERRUPTS TO THE CPU, OR CASCADE UP TO 64 LEVELS TO THE CPU WITHOUT ADDITIONAL CIRCUITRY. ALL THE OPERATION MODE AND
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GFI2590A
GFI2590A
GFX2590A
CAS12
82S9A
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transistor N14
Abstract: n7 transistor transistor n15 n10 transistor N4 transistor P-029 P08 transistor LSA2000 p023 transistor
Text: GFB2020A GFB2020A GFB2020A 16 X 16 2 'S COMPLIMENT MULTIPLIER GENERAL DESCRIPTION: THE GFB2020A MEGAFUNCTION IS A 16 X 16 2 'S COMPLEMENT MULTIPLIER WHICH GENERATES A 32-BIT PRODUCT. BY USING A MODIFIED BOOTH ALGORITHM, THIS MEGAFUNCTION GIVES A REASONABLE SPEED AND GATE COUNT.
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GFB2020A
GFB2020A
32-BIT
LL7000
LSA2000
-GFB2020ABOOK
transistor N14
n7 transistor
transistor n15
n10 transistor
N4 transistor
P-029
P08 transistor
p023 transistor
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amd 2900
Abstract: LSA200 Am2910 GFA0100A
Text: GFAOIOOA GFAOIOOA GFAOIOOA MICROPROGRAM CONTROLLER GENERAL DESCRIPTION: THE GFAOIOOA IS A 12-BIT WIDE ADDRESS SEQUENCER WHICH CONTROLS THE SEQUENCE OF EXECUTION OF THE MICRO-INSTRUCTIONS . IT IS DESIGNED TO BE FULLY COMPATIBLE WITH THE AM2910 EXCEPT WHEN ILLEGAL OPERATIONS ARE PERFORMED ON THE STACK E.G. , TRYING
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GFA0100A
12-BIT
AM2910
LL7000
LSA2000
amd 2900
LSA200
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amd 2900
Abstract: AM2910A
Text: GFA0102A GFA0102A GFA0102A MICROPROGRAM CONTROLLER GENERAL DESCRIPTION: THE GFA0X02A IS A 9-DEEP STACK, 12-BIT WIDE ADDRESS SEQUENCER WHICH CONTROLS THE SEQUENCE OF EXECUTION OF THE MICRO-INSTRUCTIONS. IT IS DESIGNED TO BE FULLY COMPATIBLE WITH THE AM2910A, EXCEPT WHEN ILLEGAL OPERATIONS ARE PERFORMED ON THE
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GFA0102A
GFA0102A
GFA0X02A
12-BIT
AM2910A,
amd 2900
AM2910A
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amd 2900
Abstract: AM2911
Text: G F A O llO A G F A O llO A GFAOllOA 4-BIT MICROPROGRAM SEQUENCER GENERAL DESCRIPTION: THE GFAOllOA IS A 4-BIT HIDE ADDRESS CONTROLLER WHICH ARRANGES IN SEQUENCE A SERIES OP MICRO-INSTRUCTIONS. IT IS DESIGNED TO BE COMPATIBLE WITH THE AM2911 EXCEPT FOR THE ABSENCE OF THE OUTPUT ENABLE CONTROL. THE GFAOllOA IS BASICALLY
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AM2911
GFA0090A
LL7000
LSA2000
amd 2900
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4 bit ALU
Abstract: No abstract text available
Text: GFBIOIOA GFBIOIOA GFBIOIOA 4—BIT ALU GENERAL DESCRIPTION: THE GFBIOIOA MEGAFUNCTION IS LOGICALLY IDENTICAL TO THE FAIRCHILD 100181, EXCEPT FOR THE ABSENCE OF THE OUTPUT LATCHES AND THE LATCH ENABLE INPUT SIGNAL. THE GFBIOIOA ARITHMETIC LOGIC UNIT ALU PERFORMS 4 BINARY, 4BCD, AND 8 LOGIC
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GFB1010A
LL7000
LSA2000
4 bit ALU
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16-bit alu
Abstract: functional diagram of ALU 16 BIT ALU by 74181 alu 74181 pin diagram Abb M alu 74181 logic GFT1811A 16 BIT ALU 74181 ALU 4bit arithmetic logic alu 74181 logic diagram
Text: GFT1811A GFT1811A G F T1811A 16-BIT ALU GENERAL DESCRIPTION: THE GFT1811A MEGAFUNCTION IS LOGICALLY IDENTICAL TO THE TI 74181, EXCEPT IT OPERATES ON TWO 16-BIT BORDS INSTEAD OF TWO 4-BIT WORDS. THE GFT1811A ARITHMETIC LOGIC DNIT ALU PERFORMS 16 LOGICAL AND 16 BINARY ARITHMETIC OPERATIONS ON TWO
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GFT1811A
T1811A
GFT1811A
16-BIT
B15-B0)
GFTI811A
16-bit alu
functional diagram of ALU
16 BIT ALU by 74181
alu 74181 pin diagram
Abb M
alu 74181 logic
16 BIT ALU
74181 ALU 4bit arithmetic logic
alu 74181 logic diagram
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transistor z14 L
Abstract: transistor z9 Transistor Z14
Text: GFCIOIOA GFCIOIOA G F CIOIOA 16-BIT BARREL SHIFTER GENERAL DESCRIPTION: THE GFCIOIOA MEGAFUNCTION PERFORMS » 16-BIT END-AROUND SHIFT, OR A BARREL SHIFT. THERE ARE FOUR CONTROL LINES SI, S2 , S4, AND SB TO DETERMINE HOW MANY PLACES TO THE LEFT THE 16-BIT INPOTS (R15 THROUGH RO) WILL BE SHIFTED AT THE OUTPUTS
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16-BIT
LL7000
LSA2000
R5R14
R13R12R11
R12R11
R15R14
R13R12
transistor z14 L
transistor z9
Transistor Z14
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