Contextual Info: LVC125A 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O LVC125A DESCRIPTION: FEATURES: The LVC125A quadruple bus buffer gate is built using advanced dual

Contextual Info: 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: - 0.5 MICRON CMOS Technology - ESD > 2000V per MIL-STD-883, Method 3015; - LVC125A ADVANCE INFORMATION D E S C R IP TIO N : The LVC125A quadruple bus buffer gate is built using advanced dual

Contextual Info: HD7 4 LVC125A Quad. Bus Buffer Gates with 3-state Outputs HITACHI ADE-205-108B Z 3rd Edition December 1996 Description The LVC125A has four bus buffer gates in a 14 pin package. The device require the three state control input C to be taken high to put the output into the high impedance condition, whereas the device

lvc125a

Contextual Info: LVC125A 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O LVC125A DESCRIPTION: FEATURES: The LVC125A quadruple bus buffer gate is built using advanced dual

Contextual Info: LVC125A www.ti.com SCAS290P – JANUARY 1993 – REVISED OCTOBER 2010 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS Check for Samples: LVC125A FEATURES 1 • 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW 1A 1Y 2OE

lc125a

Abstract: lc-125A lc125
Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCAS290L – JANUARY 1993 – REVISED MARCH 2003 D 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW description/ordering information 1A 1Y 2OE 2A 2Y This quadruple bus buffer gate is designed for

soic 08

Contextual Info: LVC125A www.ti.com SCAS290P – JANUARY 1993 – REVISED OCTOBER 2010 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS Check for Samples: LVC125A FEATURES 1 • 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW 1A 1Y 2OE

LC125A

Abstract: LVC125 SN74LVC125A SN74LVC125AD SN74LVC125ADBR SN74LVC125ADR SN74LVC125ANSR SN74LVC125APW SN74LVC125APWR SN74LVC125ARGYR
Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCAS290L – JANUARY 1993 – REVISED MARCH 2003 D 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW description/ordering information 1A 1Y 2OE 2A 2Y This quadruple bus buffer gate is designed for

Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCAS290O – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW 1A 1Y 2OE 2A 2Y VCC • 1 1 14 2 13 4OE 3 4 12 4A

lc125a

Abstract: A115-A C101 SN74LVC125A SN74LVC125AD SN74LVC125ARGYR
Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUTS SCAS290N − JANUARY 1993 − REVISED FEBRUARY 2004 D Operates From 1.65 V to 3.6 V D Specified From −40°C to 85°C and D, DB, NS, OR PW PACKAGE TOP VIEW −40°C to 125°C 1OE 1A 1Y 2OE 2A 2Y

LVC125

Abstract: lvc14 lvc04 LVC74A lvc138a LVC00 lvc04a LVC14A lvc08 LVC08A
Contextual Info: TEXAS INSTRUMENTS Informational Notification of Datasheet Changes to Selected LVC Devices September 25, 1996 Abstract Texas Instruments is reducing the maximum limit on various timing specifications on a selected group of LVC devices. This reduction is within the current specification and no changes were made to the die

LC125A

Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCAS290O – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW 1A 1Y 2OE 2A 2Y VCC • 1 1 14 2 13 4OE 3 4 12 4A

7054F

Abstract: BC564A HA13563 AC123A HITACHI microcontroller H8 534 manual IC 74LS47 AC538 BC245A 2SK3235 HA13557
Contextual Info: INDEX General General Information Semiconductor Packages Sales Locations Microcontroller Microcontroller General MultiChipModules Smart Card Micro. Overview Micro. Shortform Micro. Hardware Manual Micro. Program. Manual Micro. Application Notes LCD Controller / Driver

LVC125A

Abstract: IDT74LVC125A
Contextual Info: LVC125A 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O LVC125A FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCAS290M – JANUARY 1993 – REVISED JULY 2003 D 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW description/ordering information 1A 1Y 2OE 2A 2Y This quadruple bus buffer gate is designed for

LC125A

Abstract: A115-A C101 SN74LVC125A SN74LVC125ARGYR
Contextual Info: LVC125A www.ti.com SCAS290P – JANUARY 1993 – REVISED OCTOBER 2010 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS Check for Samples: LVC125A FEATURES 1 • 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW 1A 1Y 2OE

lvc125a

Contextual Info: 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O LVC125A ADVANCE INFORMATION DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 - 1,27mm pitch SOIC, 0.65mm pitch SSOP and

lc125a

Abstract: SN74LVC125A SN74LVC125AD SN74LVC125ADBR SN74LVC125ADR SN74LVC125ADT SN74LVC125ANSR SN74LVC125APW SN74LVC125ARGYR lc125
Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUTS SCAS290M − JANUARY 1993 − REVISED JULY 2003 D 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW description/ordering information 1A 1Y 2OE 2A 2Y This quadruple bus buffer gate is designed for

Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCAS290O – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW 1A 1Y 2OE 2A 2Y VCC • 1 1 14 2 13 4OE 3 4 12 4A

SCAS290J

Abstract: lc125A
Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCAS290J – JANUARY 1993 – REVISED AUGUST 2002 D 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW description/ordering information This quadruple bus buffer gate is designed for

Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCAS290O – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW 1A 1Y 2OE 2A 2Y VCC • 1 1 14 2 13 4OE 3 4 12 4A

Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCAS290O – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW 1A 1Y 2OE 2A 2Y VCC • 1 1 14 2 13 4OE 3 4 12 4A

A115-A

Abstract: C101 SN74LVC125A SN74LVC125AD SCAS290G
Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCAS290G – JANUARY 1993 – REVISED JUNE 2001 D D D D D D, DB, OR PW PACKAGE TOP VIEW Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

lc125a

Abstract: slaa089 F11x1 MSP430C1101 A115-A C101 SN74LVC125A SN74LVC125ARGYR PW Series
Contextual Info: LVC125A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCAS290O – JANUARY 1993 – REVISED AUGUST 2005 FEATURES • 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE TOP VIEW 1A 1Y 2OE 2A 2Y VCC • 1 1 14 2 13 4OE 3 4 12 4A