M13L2561616A Search Results

Untitled

Abstract: No abstract text available
Text: ESMT M13L2561616A 2A DDR SDRAM 4M x 16 Bit x 4 Banks Double Data Rate SDRAM Features z Double-data-rate architecture, two data transfers per clock cycle z Bi-directional data strobe (DQS) z Differential clock inputs (CLK and CLK ) z DLL aligns DQ and DQS transition with CLK transition