SN74AUC2G125DCUR
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages
|
Original
|
PDF
|
SN74AUC2G125
SCES532A
000-V
A114-A)
A115-A)
SN74AUC2G125DCUR
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages
|
Original
|
PDF
|
SN74AUC2G125
SCES532A
000-V
A114-A)
A115-A)
|
A115-A
Abstract: C101 SN74AUC2G125
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages
|
Original
|
PDF
|
SN74AUC2G125
SCES532A
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G125
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532B – DECEMBER 2003 – REVISED JUNE 2006 FEATURES • • • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Optimized for 1.8-V Operation and Is 3.6-V I/O
|
Original
|
PDF
|
SN74AUC2G125
SCES532B
000-V
A114-A)
A115-A)
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
|
A115-A
Abstract: C101 SN74AUC2G125 SN74AUC2G125DCUR
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G125
SN74AUC2G125DCUR
|
A115-A
Abstract: C101 SN74AUC2G125 SN74AUC2G125YEPR
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3ĆSTATE OUTPUTS SCES532A − DECEMBER 2003 − REVISED FEBRUARY 2004 D Available in the Texas Instruments D D D D D D D D DCT OR DCU PACKAGE TOP VIEW NanoStar and NanoFree Packages Optimized for 1.8-V Operation and Is 3.6-V
|
Original
|
PDF
|
SN74AUC2G125
SCES532A
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G125
SN74AUC2G125YEPR
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532C
000-V
A114-A)
A115-A)
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
|
SN74AUC2G125DCUR
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
SN74AUC2G125DCUR
|
SN74AUC2G125DCUR
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
SN74AUC2G125DCUR
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532B – DECEMBER 2003 – REVISED JUNE 2006 FEATURES • • • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Optimized for 1.8-V Operation and Is 3.6-V I/O
|
Original
|
PDF
|
SN74AUC2G125
SCES532B
000-V
A114-A)
A115-A)
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
|
SN74AUC2G125DCUR
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
SN74AUC2G125DCUR
|
|
|
A115-A
Abstract: C101 SN74AUC2G125 SN74AUC2G125YEPR
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3ĆSTATE OUTPUTS SCES532A − DECEMBER 2003 − REVISED FEBRUARY 2004 D Available in the Texas Instruments D D D D D D D D DCT OR DCU PACKAGE TOP VIEW NanoStar and NanoFree Packages Optimized for 1.8-V Operation and Is 3.6-V
|
Original
|
PDF
|
SN74AUC2G125
SCES532A
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G125
SN74AUC2G125YEPR
|
SN74AUC2G125DCUR
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
SN74AUC2G125DCUR
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532B – DECEMBER 2003 – REVISED JUNE 2006 FEATURES • • • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Optimized for 1.8-V Operation and Is 3.6-V I/O
|
Original
|
PDF
|
SN74AUC2G125
SCES532B
000-V
A114-A)
A115-A)
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
|
A115-A
Abstract: C101 SN74AUC2G125 SN74AUC2G125DCUR
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G125
SN74AUC2G125DCUR
|
SN74AUC2G125DCUR
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
SN74AUC2G125DCUR
|
SN74AUC2G125DCUR
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
SN74AUC2G125DCUR
|
Untitled
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3ĆSTATE OUTPUTS SCES532 − DECEMBER 2003 D Available in the Texas Instruments D D D D D D D D DCT OR DCU PACKAGE TOP VIEW NanoStar and NanoFree Packages Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532
000-V
A114-A)
A115-A)
|
A115-A
Abstract: C101 SN74AUC2G125
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages
|
Original
|
PDF
|
SN74AUC2G125
SCES532A
000-V
A114-A)
A115-A)
A115-A
C101
SN74AUC2G125
|
SN74AUC2G125DCUR
Abstract: No abstract text available
Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal
|
Original
|
PDF
|
SN74AUC2G125
SCES532D
000-V
A114-A)
A115-A)
SN74AUC2G125DCUR
|